/* * ppd_pvt.h * ppd_pvt.h. Packet processor driver private header file. * * Version 0.3 * * (C) 2007, Texas Instruments, Inc. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ * * * This program is distributed in the hope it will be useful, but WITHOUT * kind, whether express or implied; without even the implied warranty * for more details. * * with this program; if not, write to the Free Software Foundation, Inc., * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. */ #ifndef _INCLUDE_PPD_PVT_H #define _INCLUDE_PPD_PVT_H #if defined (CONFIG_MACH_PUMA6) #include #endif #if defined (CONFIG_MACH_PUMA5) #include #endif #define PPD_ENABLE_LUT_DUMP #define PPD_DEBUG_ERR (1<<0) #define PPD_DEBUG_MSG (1<<1) #define PPD_DEBUG_CMD (1<<2) #define PPD_DEBUG_EVN (1<<3) #define PPD_DEBUG (PPD_DEBUG_ERR) //#define PPD_DEBUG (PPD_DEBUG_ERR|PPD_DEBUG_MSG) #define STRUCT_B0_3(b0, b1, b2, b3) struct {Uint8 b3; Uint8 b2; Uint8 b1; Uint8 b0;} #define STRUCT_B0_1_S0(b0, b1, s0) struct {Uint16 s0; Uint8 b1; Uint8 b0; } #define STRUCT_S0_B0_1(s0, b0, b1) struct {Uint8 b1; Uint8 b0; Uint16 s0;} #define STRUCT_S0_1(s0, s1) struct {Uint16 s1; Uint16 s0;} #define STRUCT_W0(w0) struct {Uint32 w0;} #ifdef CONFIG_MACH_PUMA5 /* LUT L2-ETH Enable Flags */ #define TI_PP_L2_LUT_DST_MAC_EN (0x5 << 0) #define TI_PP_L2_LUT_SRC_MAC_EN (0x5 << 1) #define TI_PP_L2_LUT_ETH_TYPE_EN (0x1 << 4) #define TI_PP_L2_LUT_VLAN_ID_EN (0x1 << 5) #define TI_PP_L2_LUT_PKT_KEY_EN (0x1 << 6) #define TI_PP_L2_LUT_IN_PID_EN (0x1 << 7) #define TI_PP_L2_LUT_VLAN_PRI_EN (0x1 << 8) #define TI_PP_L2_LUT_DOCSIS_ID_EN (0x1 << 9) /* LUT L3-IPv4 Enable Flags */ #define TI_PP_L3_LUT_DST_IPV4_EN (0x1 << 0) #define TI_PP_L3_LUT_SRC_IPV4_EN (0x1 << 1) #define TI_PP_L3_LUT_TCP_UDP_DST_PORT_EN (0x1 << 2) #define TI_PP_L3_LUT_TCP_UDP_SRC_PORT_EN (0x1 << 3) #define TI_PP_L3_LUT_PPPOE_SES_ID_EN (0x1 << 4) #define TI_PP_L3_LUT_PKT_KEY_EN (0x1 << 6) #define TI_PP_L3_LUT_IPV4_FRAG_FLAG_EN (0x1 << 7) #define TI_PP_L3_LUT_IPV4_PROTO_EN (0x1 << 8) #define TI_PP_L3_LUT_IPV4_TOS_EN (0x1 << 9) /* LUT L3-IPv6 Enable Flags */ #define TI_PP_L3_LUT_DST_IPV6_EN (0x1 << 0) #define TI_PP_L3_LUT_SRC_IPV6_EN (0x1 << 1) //#define TI_PP_L3_LUT_TCP_UDP_DST_PORT_EN (0x1 << 2) //#define TI_PP_L3_LUT_TCP_UDP_SRC_PORT_EN (0x1 << 3) //#define TI_PP_L3_LUT_PPPOE_SES_ID_EN (0x1 << 4) #define TI_PP_L3_LUT_IPV6_FLOW_LBL_LOW_EN (0x1 << 5) //#define TI_PP_L3_LUT_PKT_KEY_EN (0x1 << 6) #define TI_PP_L3_LUT_IPV6_FLOW_LBL_HI_EN (0x1 << 7) #define TI_PP_L3_LUT_IPV6_NEXT_HDR_EN (0x1 << 8) #define TI_PP_L3_LUT_IPV6_T_CLASS_EN (0x1 << 9) #define TI_PP_L3_LUT_IPV6_FLOW_LBL_EN (TI_PP_L3_LUT_IPV6_FLOW_LBL_LOW_EN | TI_PP_L3_LUT_IPV6_FLOW_LBL_HI_EN) #define TI_PP_L3_LUT_IPV6_DSLITE_EN (TI_PP_L3_LUT_PPPOE_SES_ID_EN | TI_PP_L3_LUT_IPV6_FLOW_LBL_LOW_EN) // we reuse both flags since DsLite dst ip is set instead of these fields #else // CONFIG_MACH_PUMA6 /* LUT1 L2-ETH Enable Flags */ #define TI_PP_L2_LUT_DST_MAC_EN (0x3) #define TI_PP_L2_LUT_SRC_MAC_EN (0x7 << 1) #define TI_PP_L2_LUT_ETH_TYPE_EN (0x1 << 5) #define TI_PP_L2_LUT_IN_PID_EN (0x1 << 6) #define TI_PP_L2_LUT_PKT_KEY_EN (0x1 << 7) /* LUT1 L3-IP Enable Flags */ #define TI_PP_L3_LUT_LAN_IPV4_EN (0x1) #define TI_PP_L3_LUT_LAN_IPV6_EN (0x3F) #define TI_PP_L3_LUT_PPPOE_SES_ID_EN (0x3 << 6) #define TI_PP_L3_LUT_IP_PROTO_EN (0x1 << 8) #define TI_PP_L3_LUT_PKT_KEY_EN (0x1 << 9) /* LUT2 Enable Flags */ #define TI_PP_LUT2_WAN_IP_EN 0x01 #define TI_PP_LUT2_IPV6_FLOW_LABEL_EN 0x02 #define TI_PP_LUT2_FIRST_VLAN_EN 0x04 #define TI_PP_LUT2_SECOND_VLAN_EN 0x08 #define TI_PP_LUT2_L4_SRC_PORT_EN 0x10 #define TI_PP_LUT2_L4_DEST_PORT_EN 0x20 #define TI_PP_LUT2_TOS_TRAFFIC_CLASS_EN 0x40 #define TI_PP_L3_LUT_IPV6_DSLITE_EN TI_PP_LUT2_IPV6_FLOW_LABEL_EN #endif /* LUT Entry Type */ #define TI_PP_LUT_DATA_L2_ETH (0x00) #define TI_PP_LUT_DATA_L2_UNDEF (0x07) #define TI_PP_LUT_DATA_L3_IPV4 (0x08) #define TI_PP_LUT_DATA_L3_IPV6 (0x09) #define TI_PP_LUT_DATA_L3_DSLITE (0x0A) #define TI_PP_LUT_DATA_L3_DS_GRE (0x0B) #define TI_PP_LUT_DATA_L3_UNDEF (0x0F) /* Valid flags in Modification Record */ #define TI_PP_MOD_IPSRC_VALID (1<<0) #define TI_PP_MOD_IPDST_VALID (1<<1) #define TI_PP_MOD_IPADR_VALID (1<<2) #define TI_PP_MOD_L3CHK_VALID (1<<3) #define TI_PP_MOD_SRCPORT_VALID (1<<4) #define TI_PP_MOD_DSTPORT_VALID (1<<5) #define TI_PP_MOD_PORTS_VALID (1<<6) #define TI_PP_MOD_L4CHK_VALID (1<<7) #define TI_PP_MOD_IPTOS_VALID (1<<8) /* Egress Framing Record */ #define TI_PP_EGR_FRM_STRIP_L2 (1<<0) #define TI_PP_EGR_FRM_TURBODOX_EN (1<<2) #define TI_PP_EGR_FRM_PPPOE_HDR (1<<4) #define TI_PP_EGR_FRM_REFRAME_IP (1<<5) #define TI_PP_EGR_FRM_TURBODOX_ADV_EN (1<<7) /* Egress Flags */ #ifdef CONFIG_MACH_PUMA5 #define TI_PP_EGR_FLAG_DSLITE_US (1<<0) #define TI_PP_EGR_FLAG_DSLITE_DS (1<<1) #define TI_PP_EGR_FLAG_GRE_US (1<<2) #define TI_PP_EGR_FLAG_GRE_DS (1<<3) #define TI_PP_EGR_FLAG_NEW_HEADER_HAS_IPV6 (1 << 4) #define TI_PP_EGR_FLAG_SESS_MAPPED_TO_LOW_PRIO (1 << 5) #define TI_PP_EGR_FLAG_TUNNEL_BP (1 << 6) #define TI_PP_EGR_FLAG_STRIP_L2_EXT (1 << 7) #else #define TI_PP_EGR_FLAG_NEW_HEADER_HAS_IPV4 (1 << 2) #define TI_PP_EGR_FLAG_NEW_HEADER_HAS_IPV6 (1 << 3) #define TI_PP_EGR_FLAG_NEW_HEADER_PTR (1 << 4) #define TI_PP_EGR_FLAG_NEW_HEADER_INTERNAL (1 << 5) #define TI_PP_EGR_FLAG_MOD_REC_VALID (1 << 6) #endif typedef Uint8 TI_PP_ses_id_t; /* Base Session */ #define TI_PP_SES_FLAG_IDLE_TMOUT (1 << 0) #ifdef CONFIG_MACH_PUMA5 #define TI_PP_SES_FLAG_PASS_AFTER_TMOUT (1 << 1) #else #define TI_PP_SES_FLAG_TCP_CONTROL (1 << 1) #endif #define TI_PP_SES_FLAG_NO_INGRESS_STATS (1 << 2) #define TI_PP_SES_FLAG_NO_EGRESS_STATS (1 << 3) #define TI_PP_SES_FLAG_XLUDE_ETH_HDR_STATS (1 << 4) #define TI_PP_SES_FLAG_UPDATE_TTL (1 << 5) #define TI_PP_SES_FLAG_PROC_TTL_EXP (1 << 6) #define TI_PP_SES_FLAG_IP_FRAG (1 << 7) #define TI_PP_SES_FLAG_PROC_IP_OPTS (1 << 8) #define TI_PP_SES_FLAG_IPV6_CLASS_MASK (3 << 8) #define TI_PP_SES_FLAG_IPV6_CLASS_SET(x) \ (((x) << 8) & TI_PP_SES_FLAG_IPV6_CLASS_MASK) #ifdef CONFIG_MACH_PUMA5 #define TI_PP_SES_FLAG_USE_FULL_SRC_IPV6 (1 << 10) #define TI_PP_SES_FLAG_USE_FULL_DST_IPV6 (1 << 11) #define TI_PP_SES_FLAG_TCP_CONTROL (1 << 12) #else #define TI_PP_SES_TUNNEL (1 << 10) #define TI_PP_SES_TUNNEL_DS (0 << 11) #define TI_PP_SES_TUNNEL_US (1 << 11) #define TI_PP_SES_TUNNEL_GRE (0 << 12) #define TI_PP_SES_TUNNEL_DS_LITE (1 << 12) #define TI_PP_SES_TUNNEL_RES2 (2 << 12) #define TI_PP_SES_TUNNEL_RES3 (3 << 12) #define TI_PP_SES_FLAG_TUNNEL_MASK (0xF << 10) #define TI_PP_SES_FLAG_GRE_US (TI_PP_SES_TUNNEL | TI_PP_SES_TUNNEL_US | TI_PP_SES_TUNNEL_GRE) #define TI_PP_SES_FLAG_GRE_DS (TI_PP_SES_TUNNEL | TI_PP_SES_TUNNEL_DS | TI_PP_SES_TUNNEL_GRE) #define TI_PP_SES_FLAG_DS_LITE_US (TI_PP_SES_TUNNEL | TI_PP_SES_TUNNEL_US | TI_PP_SES_TUNNEL_DS_LITE) #define TI_PP_SES_FLAG_DS_LITE_DS (TI_PP_SES_TUNNEL | TI_PP_SES_TUNNEL_DS | TI_PP_SES_TUNNEL_DS_LITE) #define TI_PP_SES_FLAG_DSLITE_US_FRAG_IPv4 (1 << 14) #endif /* Session Command Bits */ #define TI_PP_SES_CBIT_TABLEADD 7 #define TI_PP_SES_CBIT_TABLEREMOVE 6 #define TI_PP_SES_CBIT_SESSIONPAUSE 5 #define TI_PP_SES_CBIT_SESSIONRESUME 4 #define TI_PP_SES_CBIT_STATECHANGE 3 /* Session start state */ #define TI_PP_SES_STATE_IDLE (0x00) #define TI_PP_SES_STATE_NEEDSYNC (0x01) #ifdef CONFIG_MACH_PUMA6 #define TI_PP_SES_STATE_QUEUE (0x02) #define TI_PP_SES_STATE_FWD (0x03) #define TI_PP_SES_STATE_DIVERT (0x04) #else #define TI_PP_SES_STATE_NEEDSYNC_END (0x02) #define TI_PP_SES_STATE_QUEUE (0x03) #define TI_PP_SES_STATE_FWD (0x04) #define TI_PP_SES_STATE_DIVERT (0x05) #endif #if defined (CONFIG_MACH_PUMA6) #define SESSION_ADD_SYNC (0 << 12) /* bit 12, bit 13 are not set */ #define SESSION_REMOVE (1 << 12) #define SESSION_CHANGE (2 << 12) #define SESSION_LUT1_INDEX_VALID (1 << 14) #else /* * Session Commands */ #define SESSION_ADD_SYNC ((1<> 0) & 0xffffffff #define WSTR_S1_0(idx, w, s1_nm, s0_nm) \ "w%02d: 0x%08x {%8s : 0x%04x, %8s : 0x%04x}\n", \ idx, w, s1_nm, ((w) >> 16) & 0xffff, s0_nm, ((w) >> 0) & 0xffff #define WSTR_B3_0(idx, w, b3_nm, b2_nm, b1_nm, b0_nm) \ "w%02d: 0x%08x {%8s : 0x%02x, %8s : 0x%02x, %8s : 0x%02x, \ %8s : 0x%02x}\n",\ idx, w, b3_nm, ((w) >> 24) & 0xff, b2_nm, ((w) >> 16) & 0xff, \ b1_nm, ((w) >> 8) & 0xff, b0_nm, ((w) >> 0) & 0xff #define WSTR_S0_B1_0(idx, w, s0_nm, b1_nm, b0_nm) \ "w%02d: 0x%08x {%8s : 0x%04x, %8s : 0x%02x, %8s : 0x%02x}\n", \ idx, w, s0_nm, ((w) >> 16) & 0xffff, \ b1_nm, ((w) >> 8) & 0xff, b0_nm, ((w) >> 0) & 0xff #define WSTR_B1_0_S0(idx, w, b1_nm, b0_nm, s0_nm) \ "w%02d: 0x%08x {%8s : 0x%02x, %8s : 0x%02x, %8s : 0x%04x}\n", \ idx, w, b1_nm, ((w) >> 24) & 0xff, \ b0_nm, ((w) >> 16) & 0xff, s0_nm, ((w) >> 0) & 0xffff extern Uint32 g_ppd_init_done; extern Uint32 g_session_slots []; extern PDSP_RegsOvly g_pdsp_regs []; extern ppd_pdsp_counts g_pdsp_counts []; extern ppd_ses_timestamp g_ses_timestamp []; #define IS_SESSION_SLOT_FILLED(ses_id) \ (g_session_slots[(Uint32)(ses_id)/32] & (1<<((Uint32)(ses_id)%32))) #ifdef PPD_ENABLE_LUT_DUMP #define PP_LUT_SEARCH_WIDTH 40 /* Store LUT the 'enables' words as part of LUT info during session creation, so * that these will be decoded during providing dump of LUT to have only the * enabled fields dumped. */ #define PPD_LUT_DUMP_WORDS ((PP_LUT_SEARCH_WIDTH/4) + 2) extern Uint32 g_lut_dump_buff [TI_PP_MAX_ACCLERABLE_SESSIONS][PPD_LUT_DUMP_WORDS]; #define LUT_DATA_TYPE(lut_entry_base) (((Uint32*)lut_entry_base)[4] & 0xff) #define LUT_DATA_FLAGS(lut_entry_base) (((Uint32*)lut_entry_base)[5]) #endif /* PPD_ENABLE_LUT_DUMP */ extern ppd_ses_info_blk_t *gp_ses_blk; typedef struct { #ifdef CONFIG_MACH_PUMA5 PAL_Cppi4QueueHnd eventQHnd; PAL_Cppi4QueueHnd eventFQHnd; #endif TI_PPD_EVENT_HANDLER pfnEventHdlr; PAL_OsTimerHandle hTimer; Uint32 polltime_msecs; } ppd_event_hdlr_cfg_t; extern Uint32 g_is_in_psm; extern ppd_event_hdlr_cfg_t g_ppd_event_hdlr_cfg; extern ppd_pdsp_poll_cfg g_pdsp_poll_cfg; /* Forward declaration */ extern Int32 ppd_set_psm (Uint32 enable); extern void ppd_pdsp_poll_timer (unsigned long data); #if defined PPD_ENABLE_LUT_DUMP Int32 ppd_dump_ipv6_lut (Uint32* ptr, Uint8* dump_buff_p, Int32 buff_len); Int32 ppd_dump_ipv4_lut (Uint32* ptr, Uint8* dump_buff_p, Int32 buff_len); Int32 ppd_dump_eth_lut (Uint32* ptr, Uint8* dump_buff_p, Int32 buff_len); #endif #endif /* !_INCLUDE_PPD_PVT_H */