--- zzzz-none-000/linux-2.6.39.4/drivers/spi/Kconfig	2011-08-03 19:43:28.000000000 +0000
+++ puma6-atom-6490-729/linux-2.6.39.4/drivers/spi/Kconfig	2021-11-10 13:38:15.000000000 +0000
@@ -35,6 +35,13 @@
 	  Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
 	  sysfs, and debugfs support in SPI controller and protocol drivers.
 
+config GEN3_SPI
+        bool "Intel Media SOC SPI support"
+        depends on SPI && ARCH_GEN3
+        default y
+        help
+          This option enables Intel Media SOC SPI support.
+
 #
 # MASTER side ... talking to discrete SPI slave chips including microcontrollers
 #
@@ -74,6 +81,14 @@
 	  This selects a driver for the Atmel SPI Controller, present on
 	  many AT32 (AVR32) and AT91 (ARM) chips.
 
+config SPI_CE5XX_SPI_FLASH
+        tristate "CE5XX SPI FLASH"
+        depends on ARCH_GEN3 && HW_MUTEXES
+        default y
+        help
+          This selects a driver for CE5XX Serial Flash controler
+
+
 config SPI_BFIN
 	tristate "SPI controller driver for ADI Blackfin5xx"
 	depends on BLACKFIN
@@ -294,12 +309,20 @@
 	depends on (ARCH_PXA || (X86_32 && PCI)) && EXPERIMENTAL
 	select PXA_SSP if ARCH_PXA
 	help
-	  This enables using a PXA2xx or Sodaville SSP port as a SPI master
+	  This enables using a PXA2xx or Intel CE4100/CE4200/CE5300 port as a SPI master
 	  controller. The driver can be configured to use any SSP port and
 	  additional documentation can be found a Documentation/spi/pxa2xx.
 
 config SPI_PXA2XX_PCI
-	def_bool SPI_PXA2XX && X86_32 && PCI
+        tristate "Intel CE SPI PCI adapter"
+	depends on SPI_PXA2XX && X86_32 && PCI && GEN3_SPI
+	help
+	  This drivers supports the Intel CE SPI master controller
+
+config SPI_CE5XX_SPI_SLAVE
+	tristate "CE5XX SPI SLAVE"
+	help
+	  This selects a driver for CE5XX SPI Slave controler, it is emudulated into a spi device
 
 config SPI_S3C24XX
 	tristate "Samsung S3C24XX series SPI"
@@ -379,6 +402,55 @@
 	  To compile this driver as a module, choose M here: the
 	  module will be called ti-ssp-spi.
 
+config SPI_TI_CODEC
+	bool "SPI interface in TI Codec implementation"
+	depends on SPI_MASTER && ARCH_AVALANCHE
+	help
+	  SPI master controller in TI Codec implementation.
+
+if SPI_TI_CODEC
+config SPI_TI_CODEC_ZSI_MODE
+	bool "ZSI mode"
+    default n
+	help
+	  Enable ZSI mode in SPI CODEC Driver.
+
+
+config SPI_TI_CODEC_NO_ZSI_3_WIRE_MODE
+	bool "No ZSI- 3 wIRE mode"
+    default n
+	help
+	  In case ZSI mode is disabled enable 3 wire mode in SPI CODEC Driver.
+
+endif # SPI_TI_CODEC
+
+choice
+    prompt "SPI Operating Mode"
+    depends on ARCH_AVALANCHE && SPI 
+    default SPI_POLLING_MODE
+    help
+      Specifies the operating mode. Available mode - Pure Interrupt,
+      Polling and tasklet
+
+config SPI_INTERRUPT_MODE
+    boolean "SPI Pure Interrupt Mode"
+    help
+      Works in pure interrupt mode. Interrupts will be generated for
+      every word.
+
+config SPI_TASKLET_MODE
+    boolean "SPI Tasklet Mode"
+    help
+      Works in tasklet mode. Only one interrupt will be generated for
+      each transfer and the remaining transfer happens in a tasklet
+
+config SPI_POLLING_MODE
+    boolean "SPI Polling Mode"
+    help
+      Works in polling mode. (Not recommended)
+
+endchoice
+
 config SPI_TOPCLIFF_PCH
 	tristate "Topcliff PCH SPI Controller"
 	depends on PCI