/*--------------------------------------------------------------------------------*\ * C55-VDSP \*--------------------------------------------------------------------------------*/ #ifndef __hw_vdsp_h__ #define __hw_vdsp_h__ #include #define BIG_ENDIAN #define PUMA_VDSP_REGISTER_BASE (AVALANCHE_BOOTCFG_BASE + 0x178) #define PUMA_VDSP_MEMBASE IO_ADDRESS(0xF4000000) /*--------------------------------------------------------------------------------*\ \*--------------------------------------------------------------------------------*/ struct _vdsp_registers { union _c55_cfg1 { /*--- Base + 0 ---*/ volatile unsigned int reg; struct { #ifdef LITTLE_ENDIAN volatile unsigned int xport_base_adress:15; volatile unsigned int reserved:1; volatile unsigned int ext_base:8; volatile unsigned int reserved2:8; #endif/*--- #ifdef LITTLE_ENDIAN ---*/ #ifdef BIG_ENDIAN volatile unsigned int reserved2:8; volatile unsigned int ext_base:8; volatile unsigned int reserved:1; volatile unsigned int xport_base_adress:15; #endif/*--- #ifdef BIG_ENDIAN ---*/ } Bits; } c55_cfg1; union _c55_cfg2 { /*--- Base + 4 ---*/ volatile unsigned int reg; struct { #ifdef LITTLE_ENDIAN volatile unsigned int local_boot_vec:24; volatile unsigned int reserved:7; volatile unsigned int local_boot:1; /*--- = DSPSS boots from external memory, 1 address translation to boot from local memory according to local boot vector ---*/ #endif/*--- #ifdef LITTLE_ENDIAN ---*/ #ifdef BIG_ENDIAN volatile unsigned int local_boot:1; /*--- = DSPSS boots from external memory, 1 address translation to boot from local memory according to local boot vector ---*/ volatile unsigned int reserved:7; volatile unsigned int local_boot_vec:24; #endif/*--- #ifdef BIG_ENDIAN ---*/ } Bits; } c55_cfg2; }; #ifndef REG32_DATA #define REG32_DATA(addr) (*(volatile unsigned int *)(IO_ADDRESS(addr))) #define REG32_WRITE(addr, data) REG32_DATA((addr)) = data #endif/*--- #ifndef REG32_DATA ---*/ /*--------------------------------------------------------------------------------*\ \*--------------------------------------------------------------------------------*/ static inline void vdsp_unreset(void) { /* Enable Puma6 DSP Clock and take it out of reset */ /*--- printk("GPCR=%x\n", PAL_sysBootCfgCtrl_ReadReg(0)); ---*/ PAL_sysResetCtrl(CRU_NUM_DSP_INC, OUT_OF_RESET); PAL_sysResetCtrl(CRU_NUM_DSP_PROXY, OUT_OF_RESET); PAL_sysResetCtrl(CRU_NUM_C55, OUT_OF_RESET); } /*--------------------------------------------------------------------------------*\ * Clocks an aber lokaler reset \*--------------------------------------------------------------------------------*/ static inline void vdsp_reset(void) { /* Disable Puma6 DSP Clock and put it in reset */ /*--- printk("GPCR=%x\n", PAL_sysBootCfgCtrl_ReadReg(0)); ---*/ PAL_sysResetCtrl(CRU_NUM_C55, IN_RESET); PAL_sysResetCtrl(CRU_NUM_DSP_PROXY, IN_RESET); PAL_sysResetCtrl(CRU_NUM_DSP_INC, IN_RESET); } #endif/*--- #ifndef __hw_vdsp_h__ ---*/