--- zzzz-none-000/linux-4.9.279/arch/arm/mm/cache-l2x0.c	2021-08-08 06:38:54.000000000 +0000
+++ puma7-arm-6591-750/linux-4.9.279/arch/arm/mm/cache-l2x0.c	2023-02-08 10:58:12.000000000 +0000
@@ -15,7 +15,12 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ * Includes Intel Corporation's changes/modifications dated: 2015-2018.
+ * Changed/modified portions - Copyright © 2015-2018, Intel Corporation
+ *
  */
+
 #include <linux/cpu.h>
 #include <linux/err.h>
 #include <linux/init.h>
@@ -33,6 +38,18 @@
 #include "cache-tauros3.h"
 #include "cache-aurora-l2.h"
 
+/* Puma7 L2C310 is working in BE and this driver assume all l2caches are LE */
+#if CONFIG_CACHE_L2X0_BIG_ENDIAN
+# ifdef writel_relaxed
+#  undef writel_relaxed
+# endif
+# ifdef readl_relaxed
+#  undef readl_relaxed
+# endif
+# define writel_relaxed(v,c)     __raw_writel((__force u32) cpu_to_be32(v),c)
+# define readl_relaxed(c)        ({ u32 __r = be32_to_cpu((__force __le32) __raw_readl(c)); __r; })
+#endif
+
 struct l2c_init_data {
 	const char *type;
 	unsigned way_size_0;