--- zzzz-none-000/linux-4.9.279/drivers/tty/serial/8250/8250_port.c	2021-08-08 06:38:54.000000000 +0000
+++ puma7-arm-6591-750/linux-4.9.279/drivers/tty/serial/8250/8250_port.c	2023-02-08 10:58:14.000000000 +0000
@@ -15,6 +15,11 @@
  *  membase is an 'ioremapped' cookie.
  */
 
+/*
+ * Includes Intel Corporation's changes/modifications dated: 2017, 2018.
+ * Changed/modified portions - Copyright (c) 2017-2018, Intel Corporation.
+ */
+
 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
 #endif
@@ -44,6 +49,14 @@
 
 #include "8250.h"
 
+#ifdef CONFIG_MACH_PUMA6
+#include <asm-arm/arch-avalanche/puma6/puma6.h>
+#endif
+
+#if CONFIG_MACH_PUMA7
+#include <asm-arm/arch-avalanche/puma7/puma7.h>
+#endif
+
 /*
  * Debugging.
  */
@@ -251,6 +264,13 @@
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_AFE,
 	},
+    [PORT_TI_16550A] = {
+		.name		= "TI 16550A",
+		.fifo_size	= 16,
+		.tx_loadsz	= 16,
+		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
+		.flags		= UART_CAP_FIFO | UART_CAP_UUE,
+    },
 	/*
 	 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement
 	 * workaround of errata A-008006 which states that tx_loadsz should
@@ -1105,6 +1125,15 @@
 	 * already a 1 and maybe locked there before we even start start.
 	 */
 	iersave = serial_in(up, UART_IER);
+
+    /* TI default UART_IER upper nibble to 0 */
+    if((iersave & 0xF0) == 0) {
+		DEBUG_AUTOCONF("TI 16550A");
+		up->port.type = PORT_TI_16550A;
+		up->capabilities |= UART_CAP_UUE;
+	return;
+    }
+
 	serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
 	if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
 		/*
@@ -1708,6 +1737,14 @@
 			break;
 		lsr = serial_in(up, UART_LSR);
 	} while (lsr & (UART_LSR_DR | UART_LSR_BI));
+	if (256 - max_count > 15)
+	{
+		up->port.histogram_RX_stats[15]++;
+	}
+	else
+	{
+		up->port.histogram_RX_stats[256 - max_count]++;
+	}
 
 	tty_flip_buffer_push(&port->state->port);
 	return lsr;
@@ -2598,6 +2635,20 @@
 			up->fcr &= ~UART_FCR_TRIGGER_MASK;
 			up->fcr |= UART_FCR_TRIGGER_1;
 		}
+		else
+#if defined (CONFIG_MACH_PUMA6) || defined (CONFIG_MACH_PUMA7)
+		{
+			if (up->port.irq == AVALANCHE_UART1_INT)
+			{
+				up->fcr &= ~UART_FCR_TRIGGER_MASK;
+				up->fcr |= UART_FCR_TRIGGER_1;	
+			}
+			else
+#endif
+			{
+				up->fcr = uart_config[up->port.type].fcr;
+			}
+		}
 	}
 
 	/*
@@ -2610,7 +2661,10 @@
 		if (termios->c_cflag & CRTSCTS)
 			up->mcr |= UART_MCR_AFE;
 	}
-
+	if (termios->c_cflag & CRTSCTS)
+	{
+		up->mcr |= UART_MCR_AFE;
+	}
 	/*
 	 * Update the per-port timeout.
 	 */
@@ -3121,7 +3175,7 @@
 {
 	struct uart_8250_port *up = up_to_u8250p(port);
 
-	wait_for_xmitr(up, UART_LSR_THRE);
+	wait_for_xmitr(up, BOTH_EMPTY);
 	serial_port_out(port, UART_TX, ch);
 }
 
@@ -3152,7 +3206,7 @@
  *
  *	The console_lock must be held when we get here.
  */
-void serial8250_console_write(struct uart_8250_port *up, const char *s,
+static void serial8250_console_write1(struct uart_8250_port *up, const char *s,
 			      unsigned int count)
 {
 	struct uart_port *port = &up->port;
@@ -3211,6 +3265,16 @@
 	serial8250_rpm_put(up);
 }
 
+void serial8250_console_write(struct uart_8250_port *up, const char *s,
+			      unsigned int count)
+{
+	int i;
+	for (i = 0; i < count; i++)
+	{
+		serial8250_console_write1(up, &s[i], 1);
+	}
+}
+
 static unsigned int probe_baud(struct uart_port *port)
 {
 	unsigned char lcr, dll, dlm;