// SPDX-License-Identifier: GPL-2.0-only /* * SMP initialisation and IPI support * Based on arch/arm64/kernel/smp.c * * Copyright (C) 2012 ARM Ltd. * Copyright (C) 2015 Regents of the University of California * Copyright (C) 2017 SiFive */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "head.h" static DECLARE_COMPLETION(cpu_running); void __init smp_prepare_boot_cpu(void) { init_cpu_topology(); #ifdef CONFIG_RISCV_ERRATA_ALTERNATIVE apply_boot_alternatives(); #endif } void __init smp_prepare_cpus(unsigned int max_cpus) { int cpuid; int ret; unsigned int curr_cpuid; curr_cpuid = smp_processor_id(); store_cpu_topology(curr_cpuid); numa_store_cpu_info(curr_cpuid); numa_add_cpu(curr_cpuid); /* This covers non-smp usecase mandated by "nosmp" option */ if (max_cpus == 0) return; for_each_possible_cpu(cpuid) { if (cpuid == curr_cpuid) continue; if (cpu_ops[cpuid]->cpu_prepare) { ret = cpu_ops[cpuid]->cpu_prepare(cpuid); if (ret) continue; } set_cpu_present(cpuid, true); numa_store_cpu_info(cpuid); } } void __init setup_smp(void) { struct device_node *dn; int hart; bool found_boot_cpu = false; int cpuid = 1; cpu_set_ops(0); for_each_of_cpu_node(dn) { hart = riscv_of_processor_hartid(dn); if (hart < 0) continue; if (hart == cpuid_to_hartid_map(0)) { BUG_ON(found_boot_cpu); found_boot_cpu = 1; early_map_cpu_to_node(0, of_node_to_nid(dn)); continue; } if (cpuid >= NR_CPUS) { pr_warn("Invalid cpuid [%d] for hartid [%d]\n", cpuid, hart); break; } cpuid_to_hartid_map(cpuid) = hart; early_map_cpu_to_node(cpuid, of_node_to_nid(dn)); cpuid++; } BUG_ON(!found_boot_cpu); if (cpuid > nr_cpu_ids) pr_warn("Total number of cpus [%d] is greater than nr_cpus option value [%d]\n", cpuid, nr_cpu_ids); for (cpuid = 1; cpuid < nr_cpu_ids; cpuid++) { if (cpuid_to_hartid_map(cpuid) != INVALID_HARTID) { cpu_set_ops(cpuid); set_cpu_possible(cpuid, true); } } } static int start_secondary_cpu(int cpu, struct task_struct *tidle) { if (cpu_ops[cpu]->cpu_start) return cpu_ops[cpu]->cpu_start(cpu, tidle); return -EOPNOTSUPP; } int __cpu_up(unsigned int cpu, struct task_struct *tidle) { int ret = 0; tidle->thread_info.cpu = cpu; ret = start_secondary_cpu(cpu, tidle); if (!ret) { wait_for_completion_timeout(&cpu_running, msecs_to_jiffies(1000)); if (!cpu_online(cpu)) { pr_crit("CPU%u: failed to come online\n", cpu); ret = -EIO; } } else { pr_crit("CPU%u: failed to start\n", cpu); } return ret; } void __init smp_cpus_done(unsigned int max_cpus) { } /* * C entry point for a secondary processor. */ asmlinkage __visible void smp_callin(void) { struct mm_struct *mm = &init_mm; unsigned int curr_cpuid = smp_processor_id(); riscv_clear_ipi(); /* All kernel threads share the same mm context. */ mmgrab(mm); current->active_mm = mm; store_cpu_topology(curr_cpuid); notify_cpu_starting(curr_cpuid); numa_add_cpu(curr_cpuid); set_cpu_online(curr_cpuid, 1); /* * Remote TLB flushes are ignored while the CPU is offline, so emit * a local TLB flush right now just in case. */ local_flush_tlb_all(); complete(&cpu_running); /* * Disable preemption before enabling interrupts, so we don't try to * schedule a CPU that hasn't actually started yet. */ local_irq_enable(); cpu_startup_entry(CPUHP_AP_ONLINE_IDLE); }