--- zzzz-none-000/linux-2.4.17/arch/mips/au1000/common/reset.c 2001-09-09 17:43:01.000000000 +0000 +++ sangam-fb-322/linux-2.4.17/arch/mips/au1000/common/reset.c 2004-11-24 13:22:38.000000000 +0000 @@ -36,9 +36,57 @@ #include #include +extern int au_sleep(void); + void au1000_restart(char *command) { - set_cp0_status(ST0_BEV | ST0_ERL); + /* Set all integrated peripherals to disabled states */ + u32 prid = read_32bit_cp0_register(CP0_PRID); + + printk(KERN_NOTICE "\n** Resetting Integrated Peripherals\n"); + switch (prid & 0xFF000000) + { + case 0x00000000: /* Au1000 */ + outl(0x02, 0xb0000010); /* ac97_enable */ + outl(0x08, 0xb017fffc); /* usbh_enable - early errata */ + asm("sync"); + outl(0x00, 0xb017fffc); /* usbh_enable */ + outl(0x00, 0xb0200058); /* usbd_enable */ + outl(0x00, 0xb0300040); /* ir_enable */ + outl(0x00, 0xb0520000); /* macen0 */ + outl(0x00, 0xb0520004); /* macen1 */ + outl(0x00, 0xb1000008); /* i2s_enable */ + outl(0x00, 0xb1100100); /* uart0_enable */ + outl(0x00, 0xb1200100); /* uart1_enable */ + outl(0x00, 0xb1300100); /* uart2_enable */ + outl(0x00, 0xb1400100); /* uart3_enable */ + outl(0x02, 0xb1600100); /* ssi0_enable */ + outl(0x02, 0xb1680100); /* ssi1_enable */ + outl(0x00, 0xb1900020); /* sys_freqctrl0 */ + outl(0x00, 0xb1900024); /* sys_freqctrl1 */ + outl(0x00, 0xb1900028); /* sys_clksrc */ + outl(0x00, 0xb1900100); /* sys_pininputen */ + break; + case 0x01000000: /* Au1500 */ + outl(0x02, 0xb0000010); /* ac97_enable */ + outl(0x08, 0xb017fffc); /* usbh_enable - early errata */ + asm("sync"); + outl(0x00, 0xb017fffc); /* usbh_enable */ + outl(0x00, 0xb0200058); /* usbd_enable */ + outl(0x00, 0xb1520000); /* macen0 */ + outl(0x00, 0xb1520004); /* macen1 */ + outl(0x00, 0xb1100100); /* uart0_enable */ + outl(0x00, 0xb1400100); /* uart3_enable */ + outl(0x00, 0xb1900020); /* sys_freqctrl0 */ + outl(0x00, 0xb1900024); /* sys_freqctrl1 */ + outl(0x00, 0xb1900028); /* sys_clksrc */ + outl(0x00, 0xb1900100); /* sys_pininputen */ + + default: + break; + } + + set_cp0_status((ST0_BEV | ST0_ERL)); set_cp0_config(CONF_CM_UNCACHED); flush_cache_all(); write_32bit_cp0_register(CP0_WIRED, 0); @@ -48,10 +96,18 @@ void au1000_halt(void) { printk(KERN_NOTICE "\n** You can safely turn off the power\n"); +#ifdef CONFIG_PM + au_sleep(); + + /* should not get here */ + printk(KERN_ERR "Unable to put cpu in sleep mode\n"); + while(1); +#else while (1) __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0"); +#endif } void au1000_power_off(void)