--- zzzz-none-000/linux-2.4.17/drivers/char/shwdt.c 2001-10-15 20:36:48.000000000 +0000 +++ sangam-fb-322/linux-2.4.17/drivers/char/shwdt.c 2004-11-24 13:23:22.000000000 +0000 @@ -10,7 +10,6 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ - #include #include #include @@ -20,7 +19,6 @@ #include #include #include -#include #include #include @@ -48,18 +46,47 @@ #define WTCSR_CKS1 0x02 #define WTCSR_CKS0 0x01 -#define WTCSR_CKS 0x07 -#define WTCSR_CKS_1 0x00 -#define WTCSR_CKS_4 0x01 -#define WTCSR_CKS_16 0x02 -#define WTCSR_CKS_32 0x03 -#define WTCSR_CKS_64 0x04 -#define WTCSR_CKS_256 0x05 -#define WTCSR_CKS_1024 0x06 +/* + * CKS0-2 supports a number of clock division ratios. At the time the watchdog + * is enabled, it defaults to a 41 usec overflow period .. we overload this to + * something a little more reasonable, and really can't deal with anything + * lower than WTCSR_CKS_1024, else we drop back into the usec range. + * + * Clock Division Ratio Overflow Period + * -------------------------------------------- + * 1/32 (initial value) 41 usecs + * 1/64 82 usecs + * 1/128 164 usecs + * 1/256 328 usecs + * 1/512 656 usecs + * 1/1024 1.31 msecs + * 1/2048 2.62 msecs + * 1/4096 5.25 msecs + */ +#define WTCSR_CKS_32 0x00 +#define WTCSR_CKS_64 0x01 +#define WTCSR_CKS_128 0x02 +#define WTCSR_CKS_256 0x03 +#define WTCSR_CKS_512 0x04 +#define WTCSR_CKS_1024 0x05 +#define WTCSR_CKS_2048 0x06 #define WTCSR_CKS_4096 0x07 -static int sh_is_open = 0; +/* + * Default clock division ratio is 5.25 msecs. Overload this at module load + * time. Any value not in the msec range will default to a timeout of one + * jiffy, which exceeds the usec overflow periods. + */ +static int clock_division_ratio = WTCSR_CKS_4096; + +#define msecs_to_jiffies(msecs) (jiffies + ((HZ * msecs + 999) / 1000)) +#define next_ping_period(cks) msecs_to_jiffies(cks - 4) +#define user_ping_period(cks) (next_ping_period(cks) * 10) + +static unsigned long sh_is_open = 0; static struct watchdog_info sh_wdt_info; +static struct timer_list timer; +static unsigned long next_heartbeat; /** * sh_wdt_write_cnt - Write to Counter @@ -94,6 +121,10 @@ */ static void sh_wdt_start(void) { + timer.expires = next_ping_period(clock_division_ratio); + next_heartbeat = user_ping_period(clock_division_ratio); + add_timer(&timer); + sh_wdt_write_csr(WTCSR_WT | WTCSR_CKS_4096); sh_wdt_write_cnt(0); sh_wdt_write_csr((ctrl_inb(WTCSR) | WTCSR_TME)); @@ -106,6 +137,8 @@ */ static void sh_wdt_stop(void) { + del_timer(&timer); + sh_wdt_write_csr((ctrl_inb(WTCSR) & ~WTCSR_TME)); } @@ -118,8 +151,13 @@ */ static void sh_wdt_ping(unsigned long data) { - sh_wdt_write_csr((ctrl_inb(WTCSR) & ~WTCSR_IOVF)); - sh_wdt_write_cnt(0); + if (time_before(jiffies, next_heartbeat)) { + sh_wdt_write_csr((ctrl_inb(WTCSR) & ~WTCSR_IOVF)); + sh_wdt_write_cnt(0); + + timer.expires = next_ping_period(clock_division_ratio); + add_timer(&timer); + } } /** @@ -134,14 +172,12 @@ { switch (MINOR(inode->i_rdev)) { case WATCHDOG_MINOR: - if (sh_is_open) { + if (test_and_set_bit(0, &sh_is_open)) return -EBUSY; - } - sh_is_open = 1; sh_wdt_start(); - return 0; + break; default: return -ENODEV; } @@ -159,17 +195,13 @@ */ static int sh_wdt_close(struct inode *inode, struct file *file) { - lock_kernel(); - if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { #ifndef CONFIG_WATCHDOG_NOWAYOUT sh_wdt_stop(); #endif - sh_is_open = 0; + clear_bit(0, &sh_is_open); } - unlock_kernel(); - return 0; } @@ -177,7 +209,7 @@ * sh_wdt_read - Read from Device * * @file: file handle of device - * @char: buffer to write to + * @buf: buffer to write to * @count: length of buffer * @ppos: offset * @@ -193,7 +225,7 @@ * sh_wdt_write - Write to Device * * @file: file handle of device - * @char: buffer to write + * @buf: buffer to write * @count: length of buffer * @ppos: offset * @@ -207,7 +239,7 @@ return -ESPIPE; if (count) { - sh_wdt_ping(0); + next_heartbeat = user_ping_period(clock_division_ratio); return 1; } @@ -246,7 +278,7 @@ break; case WDIOC_KEEPALIVE: - sh_wdt_ping(0); + next_heartbeat = user_ping_period(clock_division_ratio); break; default: @@ -269,7 +301,7 @@ static int sh_wdt_notify_sys(struct notifier_block *this, unsigned long code, void *unused) { - if (code == SYS_DOWN || SYS_HALT) { + if (code == SYS_DOWN || code == SYS_HALT) { sh_wdt_stop(); } @@ -337,6 +369,10 @@ return -EINVAL; } + init_timer(&timer); + timer.function = sh_wdt_ping; + timer.data = 0; + return 0; } @@ -359,6 +395,8 @@ MODULE_AUTHOR("Paul Mundt "); MODULE_DESCRIPTION("SH 3/4 watchdog driver"); MODULE_LICENSE("GPL"); +MODULE_PARM(clock_division_ratio, "i"); +MODULE_PARM_DESC(clock_division_ratio, "Clock division ratio. Valid ranges are from 0x5 (1.31ms) to 0x7 (5.25ms). Defaults to 0x7."); module_init(sh_wdt_init); module_exit(sh_wdt_exit);