--- zzzz-none-000/linux-2.4.17/include/asm-arm/arch-sa1100/irqs.h 2001-10-11 16:04:57.000000000 +0000 +++ sangam-fb-322/linux-2.4.17/include/asm-arm/arch-sa1100/irqs.h 2004-11-24 13:21:35.000000000 +0000 @@ -4,154 +4,148 @@ * Copyright (C) 1996 Russell King * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus). * Copyright (C) 1999 Nicolas Pitre (full GPIO irq isolation) + * + * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs. */ - #include -#define SA1100_IRQ(x) (0 + (x)) - -#define IRQ_GPIO0 SA1100_IRQ(0) -#define IRQ_GPIO1 SA1100_IRQ(1) -#define IRQ_GPIO2 SA1100_IRQ(2) -#define IRQ_GPIO3 SA1100_IRQ(3) -#define IRQ_GPIO4 SA1100_IRQ(4) -#define IRQ_GPIO5 SA1100_IRQ(5) -#define IRQ_GPIO6 SA1100_IRQ(6) -#define IRQ_GPIO7 SA1100_IRQ(7) -#define IRQ_GPIO8 SA1100_IRQ(8) -#define IRQ_GPIO9 SA1100_IRQ(9) -#define IRQ_GPIO10 SA1100_IRQ(10) -#define IRQ_GPIO11_27 SA1100_IRQ(11) -#define IRQ_LCD SA1100_IRQ(12) /* LCD controller */ -#define IRQ_Ser0UDC SA1100_IRQ(13) /* Ser. port 0 UDC */ -#define IRQ_Ser1SDLC SA1100_IRQ(14) /* Ser. port 1 SDLC */ -#define IRQ_Ser1UART SA1100_IRQ(15) /* Ser. port 1 UART */ -#define IRQ_Ser2ICP SA1100_IRQ(16) /* Ser. port 2 ICP */ -#define IRQ_Ser3UART SA1100_IRQ(17) /* Ser. port 3 UART */ -#define IRQ_Ser4MCP SA1100_IRQ(18) /* Ser. port 4 MCP */ -#define IRQ_Ser4SSP SA1100_IRQ(19) /* Ser. port 4 SSP */ -#define IRQ_DMA0 SA1100_IRQ(20) /* DMA controller channel 0 */ -#define IRQ_DMA1 SA1100_IRQ(21) /* DMA controller channel 1 */ -#define IRQ_DMA2 SA1100_IRQ(22) /* DMA controller channel 2 */ -#define IRQ_DMA3 SA1100_IRQ(23) /* DMA controller channel 3 */ -#define IRQ_DMA4 SA1100_IRQ(24) /* DMA controller channel 4 */ -#define IRQ_DMA5 SA1100_IRQ(25) /* DMA controller channel 5 */ -#define IRQ_OST0 SA1100_IRQ(26) /* OS Timer match 0 */ -#define IRQ_OST1 SA1100_IRQ(27) /* OS Timer match 1 */ -#define IRQ_OST2 SA1100_IRQ(28) /* OS Timer match 2 */ -#define IRQ_OST3 SA1100_IRQ(29) /* OS Timer match 3 */ -#define IRQ_RTC1Hz SA1100_IRQ(30) /* RTC 1 Hz clock */ -#define IRQ_RTCAlrm SA1100_IRQ(31) /* RTC Alarm */ - -#define IRQ_GPIO_11_27(x) (32 + (x) - 11) - -#define IRQ_GPIO11 IRQ_GPIO_11_27(11) -#define IRQ_GPIO12 IRQ_GPIO_11_27(12) -#define IRQ_GPIO13 IRQ_GPIO_11_27(13) -#define IRQ_GPIO14 IRQ_GPIO_11_27(14) -#define IRQ_GPIO15 IRQ_GPIO_11_27(15) -#define IRQ_GPIO16 IRQ_GPIO_11_27(16) -#define IRQ_GPIO17 IRQ_GPIO_11_27(17) -#define IRQ_GPIO18 IRQ_GPIO_11_27(18) -#define IRQ_GPIO19 IRQ_GPIO_11_27(19) -#define IRQ_GPIO20 IRQ_GPIO_11_27(20) -#define IRQ_GPIO21 IRQ_GPIO_11_27(21) -#define IRQ_GPIO22 IRQ_GPIO_11_27(22) -#define IRQ_GPIO23 IRQ_GPIO_11_27(23) -#define IRQ_GPIO24 IRQ_GPIO_11_27(24) -#define IRQ_GPIO25 IRQ_GPIO_11_27(25) -#define IRQ_GPIO26 IRQ_GPIO_11_27(26) -#define IRQ_GPIO27 IRQ_GPIO_11_27(27) - -#define SA1100_GPIO_TO_IRQ(i) (((i) < 11) ? SA1100_IRQ(i) : IRQ_GPIO_11_27(i)) - -/* To get the GPIO number from an IRQ number */ -#define GPIO_11_27_IRQ(i) (11 + (i) - 32) -#define SA1100_IRQ_TO_GPIO(i) (((i) < 11) ? (i) : GPIO_11_27_IRQ(i)) - -#define NR_IRQS (IRQ_GPIO27 + 1) - - -#if defined(CONFIG_SA1100_GRAPHICSCLIENT) || defined(CONFIG_SA1100_GRAPHICSMASTER) -#define ADS_EXT_IRQ(x) (IRQ_GPIO27 + 1 + (x)) -#undef NR_IRQS -#define NR_IRQS (ADS_EXT_IRQ(15) + 1) -#endif +#define IRQ_GPIO0 0 +#define IRQ_GPIO1 1 +#define IRQ_GPIO2 2 +#define IRQ_GPIO3 3 +#define IRQ_GPIO4 4 +#define IRQ_GPIO5 5 +#define IRQ_GPIO6 6 +#define IRQ_GPIO7 7 +#define IRQ_GPIO8 8 +#define IRQ_GPIO9 9 +#define IRQ_GPIO10 10 +#define IRQ_GPIO11_27 11 +#define IRQ_LCD 12 /* LCD controller */ +#define IRQ_Ser0UDC 13 /* Ser. port 0 UDC */ +#define IRQ_Ser1SDLC 14 /* Ser. port 1 SDLC */ +#define IRQ_Ser1UART 15 /* Ser. port 1 UART */ +#define IRQ_Ser2ICP 16 /* Ser. port 2 ICP */ +#define IRQ_Ser3UART 17 /* Ser. port 3 UART */ +#define IRQ_Ser4MCP 18 /* Ser. port 4 MCP */ +#define IRQ_Ser4SSP 19 /* Ser. port 4 SSP */ +#define IRQ_DMA0 20 /* DMA controller channel 0 */ +#define IRQ_DMA1 21 /* DMA controller channel 1 */ +#define IRQ_DMA2 22 /* DMA controller channel 2 */ +#define IRQ_DMA3 23 /* DMA controller channel 3 */ +#define IRQ_DMA4 24 /* DMA controller channel 4 */ +#define IRQ_DMA5 25 /* DMA controller channel 5 */ +#define IRQ_OST0 26 /* OS Timer match 0 */ +#define IRQ_OST1 27 /* OS Timer match 1 */ +#define IRQ_OST2 28 /* OS Timer match 2 */ +#define IRQ_OST3 29 /* OS Timer match 3 */ +#define IRQ_RTC1Hz 30 /* RTC 1 Hz clock */ +#define IRQ_RTCAlrm 31 /* RTC Alarm */ + +#define IRQ_GPIO11 32 +#define IRQ_GPIO12 33 +#define IRQ_GPIO13 34 +#define IRQ_GPIO14 35 +#define IRQ_GPIO15 36 +#define IRQ_GPIO16 37 +#define IRQ_GPIO17 38 +#define IRQ_GPIO18 39 +#define IRQ_GPIO19 40 +#define IRQ_GPIO20 41 +#define IRQ_GPIO21 42 +#define IRQ_GPIO22 43 +#define IRQ_GPIO23 44 +#define IRQ_GPIO24 45 +#define IRQ_GPIO25 46 +#define IRQ_GPIO26 47 +#define IRQ_GPIO27 48 +/* + * To get the GPIO number from an IRQ number + */ +#define GPIO_11_27_IRQ(i) ((i) - 21) -#if defined(CONFIG_SA1111) +/* + * The next 16 interrupts are for board specific purposes. Since + * the kernel can only run on one machine at a time, we can re-use + * these. If you need more, increase IRQ_BOARD_END, but keep it + * within sensible limits. IRQs 49 to 64 are available. + */ +#define IRQ_BOARD_START 49 +#define IRQ_BOARD_END 65 -#if defined(CONFIG_SA1100_GRAPHICSMASTER) -#define SA1111_IRQ(x) (ADS_EXT_IRQ(15) + 1 + 1 + (x)) +#define IRQ_SA1111_START (IRQ_BOARD_END) +#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) +#define IRQ_GPAIN1 (IRQ_BOARD_END + 1) +#define IRQ_GPAIN2 (IRQ_BOARD_END + 2) +#define IRQ_GPAIN3 (IRQ_BOARD_END + 3) +#define IRQ_GPBIN0 (IRQ_BOARD_END + 4) +#define IRQ_GPBIN1 (IRQ_BOARD_END + 5) +#define IRQ_GPBIN2 (IRQ_BOARD_END + 6) +#define IRQ_GPBIN3 (IRQ_BOARD_END + 7) +#define IRQ_GPBIN4 (IRQ_BOARD_END + 8) +#define IRQ_GPBIN5 (IRQ_BOARD_END + 9) +#define IRQ_GPCIN0 (IRQ_BOARD_END + 10) +#define IRQ_GPCIN1 (IRQ_BOARD_END + 11) +#define IRQ_GPCIN2 (IRQ_BOARD_END + 12) +#define IRQ_GPCIN3 (IRQ_BOARD_END + 13) +#define IRQ_GPCIN4 (IRQ_BOARD_END + 14) +#define IRQ_GPCIN5 (IRQ_BOARD_END + 15) +#define IRQ_GPCIN6 (IRQ_BOARD_END + 16) +#define IRQ_GPCIN7 (IRQ_BOARD_END + 17) +#define IRQ_MSTXINT (IRQ_BOARD_END + 18) +#define IRQ_MSRXINT (IRQ_BOARD_END + 19) +#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) +#define IRQ_TPTXINT (IRQ_BOARD_END + 21) +#define IRQ_TPRXINT (IRQ_BOARD_END + 22) +#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) +#define SSPXMTINT (IRQ_BOARD_END + 24) +#define SSPRCVINT (IRQ_BOARD_END + 25) +#define SSPROR (IRQ_BOARD_END + 26) +#define AUDXMTDMADONEA (IRQ_BOARD_END + 32) +#define AUDRCVDMADONEA (IRQ_BOARD_END + 33) +#define AUDXMTDMADONEB (IRQ_BOARD_END + 34) +#define AUDRCVDMADONEB (IRQ_BOARD_END + 35) +#define AUDTFSR (IRQ_BOARD_END + 36) +#define AUDRFSR (IRQ_BOARD_END + 37) +#define AUDTUR (IRQ_BOARD_END + 38) +#define AUDROR (IRQ_BOARD_END + 39) +#define AUDDTS (IRQ_BOARD_END + 40) +#define AUDRDD (IRQ_BOARD_END + 41) +#define AUDSTO (IRQ_BOARD_END + 42) +#define USBPWR (IRQ_BOARD_END + 43) +#define NIRQHCIM (IRQ_BOARD_END + 44) +#define IRQHCIBUFFACC (IRQ_BOARD_END + 45) +#define IRQHCIRMTWKP (IRQ_BOARD_END + 46) +#define NHCIMFCIR (IRQ_BOARD_END + 47) +#define USB_PORT_RESUME (IRQ_BOARD_END + 48) +#define S0_READY_NINT (IRQ_BOARD_END + 49) +#define S1_READY_NINT (IRQ_BOARD_END + 50) +#define S0_CD_VALID (IRQ_BOARD_END + 51) +#define S1_CD_VALID (IRQ_BOARD_END + 52) +#define S0_BVD1_STSCHG (IRQ_BOARD_END + 53) +#define S1_BVD1_STSCHG (IRQ_BOARD_END + 54) + +/* + * Figure out the MAX IRQ number. + * + * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. + * If graphicsclient or graphicsmaster, we don't have a SA1111. + * Otherwise, we have the standard IRQs only. + */ +#ifdef CONFIG_SA1111 +#define NR_IRQS (S1_BVD1_STSCHG + 1) +#elif defined(CONFIG_SA1100_GRAPHICSCLIENT) || \ + defined(CONFIG_SA1100_GRAPHICSMASTER) +#define ADS_EXT_IRQ(x) (IRQ_BOARD_START + (x)) +#define NR_IRQS (ADS_EXT_IRQ(15) + 1) #else -#define SA1111_IRQ(x) (IRQ_GPIO27 + 1 + (x)) +#define NR_IRQS (IRQ_BOARD_START) #endif -#define GPAIN0 SA1111_IRQ(0) -#define GPAIN1 SA1111_IRQ(1) -#define GPAIN2 SA1111_IRQ(2) -#define GPAIN3 SA1111_IRQ(3) -#define GPBIN0 SA1111_IRQ(4) -#define GPBIN1 SA1111_IRQ(5) -#define GPBIN2 SA1111_IRQ(6) -#define GPBIN3 SA1111_IRQ(7) -#define GPBIN4 SA1111_IRQ(8) -#define GPBIN5 SA1111_IRQ(9) -#define GPCIN0 SA1111_IRQ(10) -#define GPCIN1 SA1111_IRQ(11) -#define GPCIN2 SA1111_IRQ(12) -#define GPCIN3 SA1111_IRQ(13) -#define GPCIN4 SA1111_IRQ(14) -#define GPCIN5 SA1111_IRQ(15) -#define GPCIN6 SA1111_IRQ(16) -#define GPCIN7 SA1111_IRQ(17) -#define MSTXINT SA1111_IRQ(18) -#define MSRXINT SA1111_IRQ(19) -#define MSSTOPERRINT SA1111_IRQ(20) -#define TPTXINT SA1111_IRQ(21) -#define TPRXINT SA1111_IRQ(22) -#define TPSTOPERRINT SA1111_IRQ(23) -#define SSPXMTINT SA1111_IRQ(24) -#define SSPRCVINT SA1111_IRQ(25) -#define SSPROR SA1111_IRQ(26) -#define AUDXMTDMADONEA SA1111_IRQ(32) -#define AUDRCVDMADONEA SA1111_IRQ(33) -#define AUDXMTDMADONEB SA1111_IRQ(34) -#define AUDRCVDMADONEB SA1111_IRQ(35) -#define AUDTFSR SA1111_IRQ(36) -#define AUDRFSR SA1111_IRQ(37) -#define AUDTUR SA1111_IRQ(38) -#define AUDROR SA1111_IRQ(39) -#define AUDDTS SA1111_IRQ(40) -#define AUDRDD SA1111_IRQ(41) -#define AUDSTO SA1111_IRQ(42) -#define USBPWR SA1111_IRQ(43) -#define NIRQHCIM SA1111_IRQ(44) -#define IRQHCIBUFFACC SA1111_IRQ(45) -#define IRQHCIRMTWKP SA1111_IRQ(46) -#define NHCIMFCIR SA1111_IRQ(47) -#define USB_PORT_RESUME SA1111_IRQ(48) -#define S0_READY_NINT SA1111_IRQ(49) -#define S1_READY_NINT SA1111_IRQ(50) -#define S0_CD_VALID SA1111_IRQ(51) -#define S1_CD_VALID SA1111_IRQ(52) -#define S0_BVD1_STSCHG SA1111_IRQ(53) -#define S1_BVD1_STSCHG SA1111_IRQ(54) - -#define SA1111_IRQ_MAX SA1111_IRQ(54) - -#undef NR_IRQS -#define NR_IRQS (SA1111_IRQ_MAX + 1) - - -#ifdef CONFIG_ASSABET_NEPONSET - -#define MISC_IRQ0 SA1111_IRQ(55) -#define MISC_IRQ1 SA1111_IRQ(56) - -#undef NR_IRQS -#define NR_IRQS (SA1111_IRQ_MAX + 3) - -#endif /* CONFIG_ASSABET_NEPONSET */ - -#endif /* CONFIG_SA1111 */ +/* + * Board specific IRQs. Define them here. + * Do not surround them with ifdefs. + */ +#define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0) +#define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1)