--- zzzz-none-000/linux-2.4.17/include/linux/mtd/cfi.h	2001-10-04 22:13:18.000000000 +0000
+++ sangam-fb-322/linux-2.4.17/include/linux/mtd/cfi.h	2004-11-24 13:21:45.000000000 +0000
@@ -1,7 +1,7 @@
 
 /* Common Flash Interface structures 
  * See http://support.intel.com/design/flash/technote/index.htm
- * $Id: cfi.h,v 1.25 2001/09/04 07:06:21 dwmw2 Exp $
+ * $Id: cfi.h,v 1.1.1.1 2003/06/23 22:18:43 jharrell Exp $
  */
 
 #ifndef __MTD_CFI_H__
@@ -18,7 +18,7 @@
  * You can optimize the code size and performance by defining only 
  * the geometry(ies) available on your hardware.
  * CFIDEV_INTERLEAVE_n, where  represents the interleave (number of chips to fill the bus width)
- * CFIDEV_BUSWIDTH_n, where n is the bus width in bytes (1, 2 or 4 bytes)
+ * CFIDEV_BUSWIDTH_n, where n is the bus width in bytes (1, 2, 4, or 8 bytes)
  *
  * By default, all (known) geometries are supported.
  */
@@ -32,6 +32,7 @@
 #define CFIDEV_BUSWIDTH_1 (1)
 #define CFIDEV_BUSWIDTH_2 (2)
 #define CFIDEV_BUSWIDTH_4 (4)
+#define CFIDEV_BUSWIDTH_8 (8)
 
 #else
 
@@ -54,6 +55,9 @@
 #ifdef CONFIG_MTD_CFI_B4
 #define CFIDEV_BUSWIDTH_4 (4)
 #endif
+#ifdef CONFIG_MTD_CFI_B8
+#define CFIDEV_BUSWIDTH_8 (8)
+#endif
 
 #endif
 
@@ -145,6 +149,18 @@
 # define cfi_buswidth_is_4() (0)
 #endif
 
+#ifdef CFIDEV_BUSWIDTH_8
+# ifdef CFIDEV_BUSWIDTH
+#  undef CFIDEV_BUSWIDTH
+#  define CFIDEV_BUSWIDTH (map->buswidth)
+# else
+#  define CFIDEV_BUSWIDTH CFIDEV_BUSWIDTH_8
+# endif
+# define cfi_buswidth_is_8() (CFIDEV_BUSWIDTH == CFIDEV_BUSWIDTH_8)
+#else
+# define cfi_buswidth_is_8() (0)
+#endif
+
 #ifndef CFIDEV_BUSWIDTH
 #error You must define at least one bus width to support!
 #endif
@@ -206,6 +222,10 @@
   __u16 BlkStatusRegMask;
   __u8  VccOptimal;
   __u8  VppOptimal;
+  __u8  NumProtectionFields;
+  __u16 ProtRegAddr;
+  __u8  FactProtRegSize;
+  __u8  UserProtRegSize;
 } __attribute__((packed));
 
 struct cfi_pri_query {
@@ -291,6 +311,14 @@
 			val = (cmd << 16) | cmd;
 			val = cpu_to_cfi32((val << 8) | val);
 		}
+	} else if (cfi_buswidth_is_8()) {
+		if (cfi_interleave_is_2()) {
+			/* 2 x32 device in x32 mode */
+			val = cpu_to_cfi32(cmd);
+		} else if (cfi_interleave_is_4()) {
+			/* 4 x16 devices in x16 mode */
+			val = cpu_to_cfi32((cmd << 16) | cmd);
+		}
 	}
 	return val;
 }
@@ -306,7 +334,7 @@
 		return map->read8(map, addr);
 	} else if (cfi_buswidth_is_2()) {
 		return map->read16(map, addr);
-	} else if (cfi_buswidth_is_4()) {
+	} else if (cfi_buswidth_is_4() || cfi_buswidth_is_8()) {
 		return map->read32(map, addr);
 	} else {
 		return 0;
@@ -323,7 +351,7 @@
 		map->write8(map, val, addr);
 	} else if (cfi_buswidth_is_2()) {
 		map->write16(map, val, addr);
-	} else if (cfi_buswidth_is_4()) {
+	} else if (cfi_buswidth_is_4() || cfi_buswidth_is_8()) {
 		map->write32(map, val, addr);
 	}
 }
@@ -349,8 +377,33 @@
 
 	cfi_write(map, val, addr);
 
+#ifdef CFIDEV_BUSWIDTH_8
+	if(cfi_buswidth_is_8()) {
+		cfi_write(map, val, addr + 0x04);
+		if (prev_val)
+			printk(KERN_WARNING "MTD: cfi_send_gen_cmd() prev_val not fixed up for full 64 bits\n");
+	}
+#endif
+
+	return addr - base;
+}
+
+#ifdef CFIDEV_BUSWIDTH_8
+static inline __u32 cfi_send_word_cmd(u_char cmd, __u32 cmd_addr, __u32 base, struct map_info *map, struct cfi_private *cfi, int type, __u32 *prev_val)
+{
+	__u32 val;
+	__u32 addr = base + cfi_build_cmd_addr(cmd_addr, CFIDEV_INTERLEAVE, type);
+
+	val = cfi_build_cmd(cmd, map, cfi);
+
+	if (prev_val)
+		*prev_val = cfi_read(map, addr);
+
+	cfi_write(map, val, addr);
+
 	return addr - base;
 }
+#endif
 
 static inline __u8 cfi_read_query(struct map_info *map, __u32 addr)
 {
@@ -358,7 +411,7 @@
 		return map->read8(map, addr);
 	} else if (cfi_buswidth_is_2()) {
 		return cfi16_to_cpu(map->read16(map, addr));
-	} else if (cfi_buswidth_is_4()) {
+	} else if (cfi_buswidth_is_4() || cfi_buswidth_is_8()) {
 		return cfi32_to_cpu(map->read32(map, addr));
 	} else {
 		return 0;