--- zzzz-none-000/linux-3.10.107/Documentation/devicetree/bindings/usb/usb-ehci.txt	2017-06-27 09:49:32.000000000 +0000
+++ scorpion-7490-727/linux-3.10.107/Documentation/devicetree/bindings/usb/usb-ehci.txt	2021-02-04 17:41:59.000000000 +0000
@@ -1,19 +1,28 @@
 USB EHCI controllers
 
 Required properties:
-  - compatible : should be "usb-ehci".
+  - compatible : should be "generic-ehci".
   - reg : should contain at least address and length of the standard EHCI
     register set for the device. Optional platform-dependent registers
     (debug-port or other) can be also specified here, but only after
     definition of standard EHCI registers.
   - interrupts : one EHCI interrupt should be described here.
-If device registers are implemented in big endian mode, the device
-node should have "big-endian-regs" property.
-If controller implementation operates with big endian descriptors,
-"big-endian-desc" property should be specified.
-If both big endian registers and descriptors are used by the controller
-implementation, "big-endian" property can be specified instead of having
-both "big-endian-regs" and "big-endian-desc".
+
+Optional properties:
+ - big-endian-regs : boolean, set this for hcds with big-endian registers
+ - big-endian-desc : boolean, set this for hcds with big-endian descriptors
+ - big-endian : boolean, for hcds with big-endian-regs + big-endian-desc
+ - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
+ - has-transaction-translator : boolean, set this if EHCI have a Transaction
+				Translator built into the root hub.
+ - clocks : a list of phandle + clock specifier pairs
+ - phys : phandle + phy specifier pair
+ - phy-names : "usb"
+ - resets : phandle + reset specifier pair
+ - qca_force_host_mode: Set, if host mode to be forced for ATH79 SoCs
+ - qca_force_16bit_ptw: Set, if 16bit ptw to be forced for ATH79 SoCs
+ - caps-offset: Specify the caps offset
+
 
 Example (Sequoia 440EPx):
     ehci@e0000300 {
@@ -23,3 +32,27 @@
 	   reg = <0 e0000300 90 0 e0000390 70>;
 	   big-endian;
    };
+
+Example (Allwinner sun4i A10 SoC):
+   ehci0: usb@01c14000 {
+	   compatible = "allwinner,sun4i-a10-ehci", "generic-ehci";
+	   reg = <0x01c14000 0x100>;
+	   interrupts = <39>;
+	   clocks = <&ahb_gates 1>;
+	   phys = <&usbphy 1>;
+	   phy-names = "usb";
+   };
+
+Example (Qualcomm Atheros ATH79 SoC)
+
+   ehci0: usb@1b000000 {
+	   compatible = "qca,ath79-ehci", "qca,ap135-ehci", qca,ap137-ehci", "qca,ap147-ehci";
+	   reg = <0x1b000000 0x200>;
+	   interrupt-parent = <&ip3_int>;
+	   interrupts = <0>;
+	   has-transaction-translator;
+	   qca_force_host_mode;
+	   qca_force_16bit_ptw;
+	   caps-offset = <0x100>;
+	   status = "okay";
+   };