--- zzzz-none-000/linux-3.10.107/arch/arm/boot/dts/atlas6.dtsi 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/arch/arm/boot/dts/atlas6.dtsi 2021-02-04 17:41:59.000000000 +0000 @@ -27,9 +27,23 @@ timebase-frequency = <0>; bus-frequency = <0>; clock-frequency = <0>; + clocks = <&clks 12>; + operating-points = < + /* kHz uV */ + 200000 1025000 + 400000 1025000 + 600000 1050000 + 800000 1100000 + >; + clock-latency = <150000>; }; }; + arm-pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <29>; + }; + axi { compatible = "simple-bus"; #address-cells = <1>; @@ -56,15 +70,22 @@ #clock-cells = <1>; }; - reset-controller@88010000 { + rstc: reset-controller@88010000 { compatible = "sirf,prima2-rstc"; reg = <0x88010000 0x1000>; + #reset-cells = <1>; }; rsc-controller@88020000 { compatible = "sirf,prima2-rsc"; reg = <0x88020000 0x1000>; }; + + cphifbg@88030000 { + compatible = "sirf,prima2-cphifbg"; + reg = <0x88030000 0x1000>; + clocks = <&clks 42>; + }; }; mem-iobg { @@ -75,10 +96,17 @@ memory-controller@90000000 { compatible = "sirf,prima2-memc"; - reg = <0x90000000 0x10000>; + reg = <0x90000000 0x2000>; interrupts = <27>; clocks = <&clks 5>; }; + + memc-monitor { + compatible = "sirf,prima2-memcmon"; + reg = <0x90002000 0x200>; + interrupts = <4>; + clocks = <&clks 32>; + }; }; disp-iobg { @@ -103,6 +131,7 @@ reg = <0x90020000 0x10000>; interrupts = <31>; clocks = <&clks 35>; + resets = <&rstc 6>; }; }; @@ -120,6 +149,20 @@ }; }; + graphics2d-iobg { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xa0000000 0xa0000000 0x8000000>; + + ble@a0000000 { + compatible = "sirf,atlas6-ble"; + reg = <0xa0000000 0x2000>; + interrupts = <5>; + clocks = <&clks 33>; + }; + }; + dsp-iobg { compatible = "simple-bus"; #address-cells = <1>; @@ -130,6 +173,7 @@ compatible = "sirf,prima2-dspif"; reg = <0xa8000000 0x10000>; interrupts = <9>; + resets = <&rstc 1>; }; gps@a8010000 { @@ -137,6 +181,7 @@ reg = <0xa8010000 0x10000>; interrupts = <7>; clocks = <&clks 9>; + resets = <&rstc 2>; }; dsp@a9000000 { @@ -144,6 +189,7 @@ reg = <0xa9000000 0x1000000>; interrupts = <8>; clocks = <&clks 8>; + resets = <&rstc 0>; }; }; @@ -158,6 +204,7 @@ compatible = "sirf,prima2-tick"; reg = <0xb0020000 0x1000>; interrupts = <0>; + clocks = <&clks 11>; }; nand@b0030000 { @@ -181,6 +228,8 @@ interrupts = <17>; fifosize = <128>; clocks = <&clks 13>; + dmas = <&dmac1 5>, <&dmac0 2>; + dma-names = "rx", "tx"; }; uart1: uart@b0060000 { @@ -190,6 +239,7 @@ interrupts = <18>; fifosize = <32>; clocks = <&clks 14>; + dma-names = "no-rx", "no-tx"; }; uart2: uart@b0070000 { @@ -199,6 +249,8 @@ interrupts = <19>; fifosize = <128>; clocks = <&clks 15>; + dmas = <&dmac0 6>, <&dmac0 7>; + dma-names = "rx", "tx"; }; usp0: usp@b0080000 { @@ -206,7 +258,10 @@ compatible = "sirf,prima2-usp"; reg = <0xb0080000 0x10000>; interrupts = <20>; + fifosize = <128>; clocks = <&clks 28>; + dmas = <&dmac1 1>, <&dmac1 2>; + dma-names = "rx", "tx"; }; usp1: usp@b0090000 { @@ -214,7 +269,10 @@ compatible = "sirf,prima2-usp"; reg = <0xb0090000 0x10000>; interrupts = <21>; + fifosize = <128>; clocks = <&clks 29>; + dmas = <&dmac0 14>, <&dmac0 15>; + dma-names = "rx", "tx"; }; dmac0: dma-controller@b00b0000 { @@ -223,6 +281,7 @@ reg = <0xb00b0000 0x10000>; interrupts = <12>; clocks = <&clks 24>; + #dma-cells = <1>; }; dmac1: dma-controller@b0160000 { @@ -231,12 +290,15 @@ reg = <0xb0160000 0x10000>; interrupts = <13>; clocks = <&clks 25>; + #dma-cells = <1>; }; vip@b00C0000 { compatible = "sirf,prima2-vip"; reg = <0xb00C0000 0x10000>; clocks = <&clks 31>; + interrupts = <14>; + sirf,vip-dma-rx-channel = <16>; }; spi0: spi@b00d0000 { @@ -245,12 +307,13 @@ reg = <0xb00d0000 0x10000>; interrupts = <15>; sirf,spi-num-chipselects = <1>; - cs-gpios = <&gpio 0 0>; - sirf,spi-dma-rx-channel = <25>; - sirf,spi-dma-tx-channel = <20>; + dmas = <&dmac1 9>, + <&dmac1 4>; + dma-names = "rx", "tx"; #address-cells = <1>; #size-cells = <0>; clocks = <&clks 19>; + resets = <&rstc 26>; status = "disabled"; }; @@ -259,7 +322,14 @@ compatible = "sirf,prima2-spi"; reg = <0xb0170000 0x10000>; interrupts = <16>; + sirf,spi-num-chipselects = <1>; + dmas = <&dmac0 12>, + <&dmac0 13>; + dma-names = "rx", "tx"; + #address-cells = <1>; + #size-cells = <0>; clocks = <&clks 20>; + resets = <&rstc 27>; status = "disabled"; }; @@ -329,6 +399,12 @@ sirf,function = "uart0"; }; }; + uart0_noflow_pins_a: uart0@1 { + uart { + sirf,pins = "uart0_nostreamctrlgrp"; + sirf,function = "uart0_nostreamctrl"; + }; + }; uart1_pins_a: uart1@0 { uart { sirf,pins = "uart1grp"; @@ -449,6 +525,18 @@ sirf,function = "sdmmc5"; }; }; + i2s_mclk_pins_a: i2s_mclk@0 { + i2s_mclk { + sirf,pins = "i2smclkgrp"; + sirf,function = "i2s_mclk"; + }; + }; + i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 { + i2s_ext_clk_input { + sirf,pins = "i2s_ext_clk_inputgrp"; + sirf,function = "i2s_ext_clk_input"; + }; + }; i2s_pins_a: i2s@0 { i2s { sirf,pins = "i2sgrp"; @@ -485,12 +573,36 @@ sirf,function = "usp0"; }; }; + usp0_uart_nostreamctrl_pins_a: usp0@1 { + usp0 { + sirf,pins = "usp0_uart_nostreamctrl_grp"; + sirf,function = "usp0_uart_nostreamctrl"; + }; + }; + usp0_only_utfs_pins_a: usp0@2 { + usp0 { + sirf,pins = "usp0_only_utfs_grp"; + sirf,function = "usp0_only_utfs"; + }; + }; + usp0_only_urfs_pins_a: usp0@3 { + usp0 { + sirf,pins = "usp0_only_urfs_grp"; + sirf,function = "usp0_only_urfs"; + }; + }; usp1_pins_a: usp1@0 { usp1 { sirf,pins = "usp1grp"; sirf,function = "usp1"; }; }; + usp1_uart_nostreamctrl_pins_a: usp1@1 { + usp1 { + sirf,pins = "usp1_uart_nostreamctrl_grp"; + sirf,function = "usp1_uart_nostreamctrl"; + }; + }; usb0_upli_drvbus_pins_a: usb0_upli_drvbus@0 { usb0_upli_drvbus { sirf,pins = "usb0_upli_drvbusgrp"; @@ -503,6 +615,18 @@ sirf,function = "usb1_utmi_drvbus"; }; }; + usb1_dp_dn_pins_a: usb1_dp_dn@0 { + usb1_dp_dn { + sirf,pins = "usb1_dp_dngrp"; + sirf,function = "usb1_dp_dn"; + }; + }; + uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 { + uart1_route_io_usb1 { + sirf,pins = "uart1_route_io_usb1grp"; + sirf,function = "uart1_route_io_usb1"; + }; + }; warm_rst_pins_a: warm_rst@0 { warm_rst { sirf,pins = "warm_rstgrp"; @@ -515,16 +639,16 @@ sirf,function = "pulse_count"; }; }; - cko0_rst_pins_a: cko0_rst@0 { - cko0_rst { - sirf,pins = "cko0_rstgrp"; - sirf,function = "cko0_rst"; + cko0_pins_a: cko0@0 { + cko0 { + sirf,pins = "cko0grp"; + sirf,function = "cko0"; }; }; - cko1_rst_pins_a: cko1_rst@0 { - cko1_rst { - sirf,pins = "cko1_rstgrp"; - sirf,function = "cko1_rst"; + cko1_pins_a: cko1@0 { + cko1 { + sirf,pins = "cko1grp"; + sirf,function = "cko1"; }; }; }; @@ -569,6 +693,7 @@ reg = <0x56100000 0x100000>; interrupts = <38>; status = "disabled"; + bus-width = <4>; clocks = <&clks 36>; }; @@ -578,6 +703,7 @@ reg = <0x56200000 0x100000>; interrupts = <23>; status = "disabled"; + bus-width = <4>; clocks = <&clks 37>; }; @@ -587,6 +713,7 @@ reg = <0x56300000 0x100000>; interrupts = <23>; status = "disabled"; + bus-width = <4>; clocks = <&clks 37>; }; @@ -596,6 +723,7 @@ reg = <0x56500000 0x100000>; interrupts = <39>; status = "disabled"; + bus-width = <4>; clocks = <&clks 38>; }; @@ -613,7 +741,7 @@ }; rtc-iobg { - compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus"; + compatible = "sirf,prima2-rtciobg", "sirf-prima2-rtciobg-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x80030000 0x10000>; @@ -630,6 +758,12 @@ interrupts = <52 53 54>; }; + minigpsrtc@2000 { + compatible = "sirf,prima2-minigpsrtc"; + reg = <0x2000 0x1000>; + interrupts = <54>; + }; + pwrc@3000 { compatible = "sirf,prima2-pwrc"; reg = <0x3000 0x1000>;