--- zzzz-none-000/linux-3.10.107/arch/arm/mach-mvebu/platsmp.c 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/arch/arm/mach-mvebu/platsmp.c 2021-02-04 17:41:59.000000000 +0000 @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -29,96 +30,156 @@ #include "pmsu.h" #include "coherency.h" -void __init set_secondary_cpus_clock(void) +#define ARMADA_XP_MAX_CPUS 4 + +#define AXP_BOOTROM_BASE 0xfff00000 +#define AXP_BOOTROM_SIZE 0x100000 + +static struct clk *get_cpu_clk(int cpu) +{ + struct clk *cpu_clk; + struct device_node *np = of_get_cpu_node(cpu, NULL); + + if (WARN(!np, "missing cpu node\n")) + return NULL; + cpu_clk = of_clk_get(np, 0); + if (WARN_ON(IS_ERR(cpu_clk))) + return NULL; + return cpu_clk; +} + +static void set_secondary_cpu_clock(unsigned int cpu) { int thiscpu; unsigned long rate; - struct clk *cpu_clk = NULL; - struct device_node *np = NULL; + struct clk *cpu_clk; - thiscpu = smp_processor_id(); - for_each_node_by_type(np, "cpu") { - int err; - int cpu; - - err = of_property_read_u32(np, "reg", &cpu); - if (WARN_ON(err)) - return; - - if (cpu == thiscpu) { - cpu_clk = of_clk_get(np, 0); - break; - } - } - if (WARN_ON(IS_ERR(cpu_clk))) - return; + thiscpu = get_cpu(); + + cpu_clk = get_cpu_clk(thiscpu); + if (!cpu_clk) + goto out; clk_prepare_enable(cpu_clk); rate = clk_get_rate(cpu_clk); - /* set all the other CPU clk to the same rate than the boot CPU */ - for_each_node_by_type(np, "cpu") { - int err; - int cpu; - - err = of_property_read_u32(np, "reg", &cpu); - if (WARN_ON(err)) - return; - - if (cpu != thiscpu) { - cpu_clk = of_clk_get(np, 0); - clk_set_rate(cpu_clk, rate); - } - } -} + cpu_clk = get_cpu_clk(cpu); + if (!cpu_clk) + goto out; + clk_set_rate(cpu_clk, rate); + clk_prepare_enable(cpu_clk); -static void __cpuinit armada_xp_secondary_init(unsigned int cpu) -{ - armada_xp_mpic_smp_cpu_init(); +out: + put_cpu(); } -static int __cpuinit armada_xp_boot_secondary(unsigned int cpu, - struct task_struct *idle) +static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) { + int ret, hw_cpu; + pr_info("Booting CPU %d\n", cpu); - armada_xp_boot_cpu(cpu, armada_xp_secondary_startup); + hw_cpu = cpu_logical_map(cpu); + set_secondary_cpu_clock(hw_cpu); + mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); + + /* + * This is needed to wake up CPUs in the offline state after + * using CPU hotplug. + */ + arch_send_wakeup_ipi_mask(cpumask_of(cpu)); + + /* + * This is needed to take secondary CPUs out of reset on the + * initial boot. + */ + ret = mvebu_cpu_reset_deassert(hw_cpu); + if (ret) { + pr_warn("unable to boot CPU: %d\n", ret); + return ret; + } return 0; } +/* + * When a CPU is brought back online, either through CPU hotplug, or + * because of the boot of a kexec'ed kernel, the PMSU configuration + * for this CPU might be in the deep idle state, preventing this CPU + * from receiving interrupts. Here, we therefore take out the current + * CPU from this state, which was entered by armada_xp_cpu_die() + * below. + */ +static void armada_xp_secondary_init(unsigned int cpu) +{ + mvebu_v7_pmsu_idle_exit(); +} + static void __init armada_xp_smp_init_cpus(void) { - unsigned int i, ncores; - ncores = coherency_get_cpu_count(); + unsigned int ncores = num_possible_cpus(); - /* Limit possible CPUs to defconfig */ - if (ncores > nr_cpu_ids) { - pr_warn("SMP: %d CPUs physically present. Only %d configured.", - ncores, nr_cpu_ids); - pr_warn("Clipping CPU count to %d\n", nr_cpu_ids); - ncores = nr_cpu_ids; - } + if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS) + panic("Invalid number of CPUs in DT\n"); +} + +static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) +{ + struct device_node *node; + struct resource res; + int err; - for (i = 0; i < ncores; i++) - set_cpu_possible(i, true); + flush_cache_all(); + set_cpu_coherent(); - set_smp_cross_call(armada_mpic_send_doorbell); + /* + * In order to boot the secondary CPUs we need to ensure + * the bootROM is mapped at the correct address. + */ + node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); + if (!node) + panic("Cannot find 'marvell,bootrom' compatible node"); + + err = of_address_to_resource(node, 0, &res); + if (err < 0) + panic("Cannot get 'bootrom' node address"); + + if (res.start != AXP_BOOTROM_BASE || + resource_size(&res) != AXP_BOOTROM_SIZE) + panic("The address for the BootROM is incorrect"); } -void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) +#ifdef CONFIG_HOTPLUG_CPU +static void armada_xp_cpu_die(unsigned int cpu) { - set_secondary_cpus_clock(); - flush_cache_all(); - set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0); - mvebu_mbus_add_window("bootrom", 0xfff00000, SZ_1M); + /* + * CPU hotplug is implemented by putting offline CPUs into the + * deep idle sleep state. + */ + armada_370_xp_pmsu_idle_enter(true); } +/* + * We need a dummy function, so that platform_can_cpu_hotplug() knows + * we support CPU hotplug. However, the function does not need to do + * anything, because CPUs going offline can enter the deep idle state + * by themselves, without any help from a still alive CPU. + */ +static int armada_xp_cpu_kill(unsigned int cpu) +{ + return 1; +} +#endif + struct smp_operations armada_xp_smp_ops __initdata = { .smp_init_cpus = armada_xp_smp_init_cpus, .smp_prepare_cpus = armada_xp_smp_prepare_cpus, - .smp_secondary_init = armada_xp_secondary_init, .smp_boot_secondary = armada_xp_boot_secondary, + .smp_secondary_init = armada_xp_secondary_init, #ifdef CONFIG_HOTPLUG_CPU .cpu_die = armada_xp_cpu_die, + .cpu_kill = armada_xp_cpu_kill, #endif }; + +CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp", + &armada_xp_smp_ops);