--- zzzz-none-000/linux-3.10.107/arch/arm64/include/asm/cache.h	2017-06-27 09:49:32.000000000 +0000
+++ scorpion-7490-727/linux-3.10.107/arch/arm64/include/asm/cache.h	2021-02-04 17:41:59.000000000 +0000
@@ -16,7 +16,9 @@
 #ifndef __ASM_CACHE_H
 #define __ASM_CACHE_H
 
-#define L1_CACHE_SHIFT		6
+#include <asm/cachetype.h>
+
+#define L1_CACHE_SHIFT		7
 #define L1_CACHE_BYTES		(1 << L1_CACHE_SHIFT)
 
 /*
@@ -27,6 +29,17 @@
  * the CPU.
  */
 #define ARCH_DMA_MINALIGN	L1_CACHE_BYTES
-#define ARCH_SLAB_MINALIGN	8
+
+#ifndef __ASSEMBLY__
+
+#define __read_mostly __attribute__((__section__(".data..read_mostly")))
+
+static inline int cache_line_size(void)
+{
+	u32 cwg = cache_type_cwg();
+	return cwg ? 4 << cwg : L1_CACHE_BYTES;
+}
+
+#endif	/* __ASSEMBLY__ */
 
 #endif