--- zzzz-none-000/linux-3.10.107/arch/mips/include/asm/irqflags.h	2017-06-27 09:49:32.000000000 +0000
+++ scorpion-7490-727/linux-3.10.107/arch/mips/include/asm/irqflags.h	2021-02-04 17:41:59.000000000 +0000
@@ -15,27 +15,41 @@
 
 #include <linux/compiler.h>
 #include <linux/stringify.h>
+#include <asm/compiler.h>
 #include <asm/hazards.h>
 
-#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC)
+#if IS_ENABLED(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)
+#include <avm/profile/profile.h>
 
-static inline void arch_local_irq_disable(void)
+#define  _local_RET_IP_	((unsigned long)__builtin_return_address(0))
+#endif/*--- #if defined(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)  ---*/
+
+
+#if defined(CONFIG_CPU_MIPSR2) || defined (CONFIG_CPU_MIPSR6)
+
+static inline unsigned long arch_local_irq_save(void)
 {
-	__asm__ __volatile__(
+	unsigned long flags;
+#if IS_ENABLED(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)
+	unsigned long pc_addr;
+
+	asm __volatile__(
 	"	.set	push						\n"
+	"	.set	reorder						\n"
 	"	.set	noat						\n"
-	"	di							\n"
+	"	la %[pc_addr],  1f				        \n"
+	"1:	di	%[flags]					\n"
+	"	andi	%[flags], 1					\n"
 	"	" __stringify(__irq_disable_hazard) "			\n"
 	"	.set	pop						\n"
-	: /* no outputs */
+	: [flags] "=r" (flags), [pc_addr] "=r" (pc_addr)
 	: /* no inputs */
 	: "memory");
-}
-
-static inline unsigned long arch_local_irq_save(void)
-{
-	unsigned long flags;
 
+	avm_simple_profiling_irq_disabled(pc_addr, _local_RET_IP_,
+					  !flags,  /* old-disable-status */
+					  0x1	   /* new-disable-status */);
+#else
 	asm __volatile__(
 	"	.set	push						\n"
 	"	.set	reorder						\n"
@@ -47,19 +61,41 @@
 	: [flags] "=r" (flags)
 	: /* no inputs */
 	: "memory");
-
+#endif
 	return flags;
 }
+static inline void arch_local_irq_disable(void)
+{
+#if IS_ENABLED(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)
+	arch_local_irq_save();
+	return;
+#endif/*--- #if defined(CONFIG_ENABLE_IRQ_PROFILING_HOOKS) ---*/
+	__asm__ __volatile__(
+	"	.set	push						\n"
+	"	.set	noat						\n"
+	"	di							\n"
+	"	" __stringify(__irq_disable_hazard) "			\n"
+	"	.set	pop						\n"
+	: /* no outputs */
+	: /* no inputs */
+	: "memory");
+}
 
 static inline void arch_local_irq_restore(unsigned long flags)
 {
 	unsigned long __tmp1;
+#if IS_ENABLED(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)
+	avm_simple_profiling_irq_disabled((unsigned long)&&here, _local_RET_IP_,
+					  0x1,		 /* old-disable-status */
+					  !(flags & 0x1) /* new-disable-status */);
+here:
+#endif
 
 	__asm__ __volatile__(
 	"	.set	push						\n"
 	"	.set	noreorder					\n"
 	"	.set	noat						\n"
-#if defined(CONFIG_IRQ_CPU)
+#if defined(CONFIG_IRQ_MIPS_CPU)
 	/*
 	 * Slow, but doesn't suffer from a relatively unlikely race
 	 * condition we're having since days 1.
@@ -85,11 +121,17 @@
 
 static inline void __arch_local_irq_restore(unsigned long flags)
 {
+#if IS_ENABLED(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)
+	avm_simple_profiling_irq_disabled((unsigned long)&&here, _local_RET_IP_,
+					  0x1,	         /* old-disable-status */
+					  !(flags & 0x1) /* new-disable-status */);
+here:
+#endif
 	__asm__ __volatile__(
 	"	.set	push						\n"
 	"	.set	noreorder					\n"
 	"	.set	noat						\n"
-#if defined(CONFIG_IRQ_CPU)
+#if defined(CONFIG_IRQ_MIPS_CPU)
 	/*
 	 * Slow, but doesn't suffer from a relatively unlikely race
 	 * condition we're having since days 1.
@@ -118,30 +160,37 @@
 unsigned long arch_local_irq_save(void);
 void arch_local_irq_restore(unsigned long flags);
 void __arch_local_irq_restore(unsigned long flags);
-#endif /* if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_MIPS_MT_SMTC) */
+#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
 
+static inline unsigned long arch_local_save_flags(void)
+{
+	unsigned long flags;
+
+	asm __volatile__(
+	"	.set	push						\n"
+	"	.set	reorder						\n"
+	"	mfc0	%[flags], $12					\n"
+	"	.set	pop						\n"
+	: [flags] "=r" (flags));
 
-extern void smtc_ipi_replay(void);
+	return flags;
+}
 
 static inline void arch_local_irq_enable(void)
 {
-#ifdef CONFIG_MIPS_MT_SMTC
-	/*
-	 * SMTC kernel needs to do a software replay of queued
-	 * IPIs, at the cost of call overhead on each local_irq_enable()
-	 */
-	smtc_ipi_replay();
+#if IS_ENABLED(CONFIG_ENABLE_IRQ_PROFILING_HOOKS)
+	unsigned long flags = arch_local_save_flags();
+
+	avm_simple_profiling_irq_disabled((unsigned long)&&here, _local_RET_IP_,
+					  !(flags & 1), /* old-disable-status */
+					  0x0		/* new-disable-status */);
+here:
 #endif
 	__asm__ __volatile__(
 	"	.set	push						\n"
 	"	.set	reorder						\n"
 	"	.set	noat						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
-	"	mfc0	$1, $2, 1	# SMTC - clear TCStatus.IXMT	\n"
-	"	ori	$1, 0x400					\n"
-	"	xori	$1, 0x400					\n"
-	"	mtc0	$1, $2, 1					\n"
-#elif defined(CONFIG_CPU_MIPSR2)
+#if   defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
 	"	ei							\n"
 #else
 	"	mfc0	$1,$12						\n"
@@ -156,35 +205,10 @@
 	: "memory");
 }
 
-static inline unsigned long arch_local_save_flags(void)
-{
-	unsigned long flags;
-
-	asm __volatile__(
-	"	.set	push						\n"
-	"	.set	reorder						\n"
-#ifdef CONFIG_MIPS_MT_SMTC
-	"	mfc0	%[flags], $2, 1					\n"
-#else
-	"	mfc0	%[flags], $12					\n"
-#endif
-	"	.set	pop						\n"
-	: [flags] "=r" (flags));
-
-	return flags;
-}
-
 
 static inline int arch_irqs_disabled_flags(unsigned long flags)
 {
-#ifdef CONFIG_MIPS_MT_SMTC
-	/*
-	 * SMTC model uses TCStatus.IXMT to disable interrupts for a thread/CPU
-	 */
-	return flags & 0x400;
-#else
 	return !(flags & 1);
-#endif
 }
 
 #endif /* #ifndef __ASSEMBLY__ */