--- zzzz-none-000/linux-3.10.107/drivers/clk/mxs/clk-imx28.c 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/drivers/clk/mxs/clk-imx28.c 2021-02-04 17:41:59.000000000 +0000 @@ -9,9 +9,10 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include +#include +#include #include #include #include @@ -124,15 +125,15 @@ writel_relaxed(val, FRAC0); } -static const char *sel_cpu[] __initconst = { "ref_cpu", "ref_xtal", }; -static const char *sel_io0[] __initconst = { "ref_io0", "ref_xtal", }; -static const char *sel_io1[] __initconst = { "ref_io1", "ref_xtal", }; -static const char *sel_pix[] __initconst = { "ref_pix", "ref_xtal", }; -static const char *sel_gpmi[] __initconst = { "ref_gpmi", "ref_xtal", }; -static const char *sel_pll0[] __initconst = { "pll0", "ref_xtal", }; -static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", }; -static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", }; -static const char *ptp_sels[] __initconst = { "ref_xtal", "pll0", }; +static const char *const sel_cpu[] __initconst = { "ref_cpu", "ref_xtal", }; +static const char *const sel_io0[] __initconst = { "ref_io0", "ref_xtal", }; +static const char *const sel_io1[] __initconst = { "ref_io1", "ref_xtal", }; +static const char *const sel_pix[] __initconst = { "ref_pix", "ref_xtal", }; +static const char *const sel_gpmi[] __initconst = { "ref_gpmi", "ref_xtal", }; +static const char *const sel_pll0[] __initconst = { "pll0", "ref_xtal", }; +static const char *const cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", }; +static const char *const emi_sels[] __initconst = { "emi_pll", "emi_xtal", }; +static const char *const ptp_sels[] __initconst = { "ref_xtal", "pll0", }; enum imx28_clk { ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, @@ -154,16 +155,16 @@ cpu, hbus, xbus, emi, uart, }; -int __init mx28_clocks_init(void) +static void __init mx28_clocks_init(struct device_node *np) { - struct device_node *np; + struct device_node *dcnp; u32 i; - np = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl"); - digctrl = of_iomap(np, 0); + dcnp = of_find_compatible_node(NULL, NULL, "fsl,imx28-digctl"); + digctrl = of_iomap(dcnp, 0); WARN_ON(!digctrl); + of_node_put(dcnp); - np = of_find_compatible_node(NULL, NULL, "fsl,imx28-clkctrl"); clkctrl = of_iomap(np, 0); WARN_ON(!clkctrl); @@ -239,7 +240,7 @@ if (IS_ERR(clks[i])) { pr_err("i.MX28 clk %d: register failed with %ld\n", i, PTR_ERR(clks[i])); - return PTR_ERR(clks[i]); + return; } clk_data.clks = clks; @@ -250,6 +251,5 @@ for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clks[clks_init_on[i]]); - - return 0; } +CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init);