--- zzzz-none-000/linux-3.10.107/drivers/gpu/drm/nouveau/nv10_fence.c 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/drivers/gpu/drm/nouveau/nv10_fence.c 2021-02-04 17:41:59.000000000 +0000 @@ -22,9 +22,6 @@ * Authors: Ben Skeggs */ -#include -#include - #include "nouveau_drm.h" #include "nouveau_dma.h" #include "nv10_fence.h" @@ -36,7 +33,7 @@ int ret = RING_SPACE(chan, 2); if (ret == 0) { BEGIN_NV04(chan, 0, NV10_SUBCHAN_REF_CNT, 1); - OUT_RING (chan, fence->sequence); + OUT_RING (chan, fence->base.seqno); FIRE_RING (chan); } return ret; @@ -53,16 +50,20 @@ u32 nv10_fence_read(struct nouveau_channel *chan) { - return nv_ro32(chan->object, 0x0048); + return nvif_rd32(&chan->user, 0x0048); } void nv10_fence_context_del(struct nouveau_channel *chan) { struct nv10_fence_chan *fctx = chan->fence; + int i; nouveau_fence_context_del(&fctx->base); + for (i = 0; i < ARRAY_SIZE(fctx->head); i++) + nvif_object_fini(&fctx->head[i]); + nvif_object_fini(&fctx->sema); chan->fence = NULL; - kfree(fctx); + nouveau_fence_context_free(&fctx->base); } int @@ -74,7 +75,7 @@ if (!fctx) return -ENOMEM; - nouveau_fence_context_new(&fctx->base); + nouveau_fence_context_new(chan, &fctx->base); fctx->base.emit = nv10_fence_emit; fctx->base.read = nv10_fence_read; fctx->base.sync = nv10_fence_sync; @@ -105,6 +106,8 @@ priv->base.dtor = nv10_fence_destroy; priv->base.context_new = nv10_fence_context_new; priv->base.context_del = nv10_fence_context_del; + priv->base.contexts = 31; + priv->base.context_base = fence_context_alloc(priv->base.contexts); spin_lock_init(&priv->lock); return 0; }