--- zzzz-none-000/linux-3.10.107/drivers/media/dvb-frontends/au8522_decoder.c 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/drivers/media/dvb-frontends/au8522_decoder.c 2021-02-04 17:41:59.000000000 +0000 @@ -35,7 +35,6 @@ #include #include #include -#include #include #include "au8522.h" #include "au8522_priv.h" @@ -221,7 +220,7 @@ } -static void setup_decoder_defaults(struct au8522_state *state, u8 input_mode) +static void setup_decoder_defaults(struct au8522_state *state, bool is_svideo) { int i; int filter_coef_type; @@ -238,13 +237,10 @@ /* Other decoder registers */ au8522_writereg(state, AU8522_TVDEC_INT_MASK_REG010H, 0x00); - if (input_mode == 0x23) { - /* S-Video input mapping */ + if (is_svideo) au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x04); - } else { - /* All other modes (CVBS/ATVRF etc.) */ + else au8522_writereg(state, AU8522_VIDEO_MODE_REG011H, 0x00); - } au8522_writereg(state, AU8522_TVDEC_PGA_REG012H, AU8522_TVDEC_PGA_REG012H_CVBS); @@ -252,12 +248,23 @@ AU8522_TVDEC_COMB_MODE_REG015H_CVBS); au8522_writereg(state, AU8522_TVDED_DBG_MODE_REG060H, AU8522_TVDED_DBG_MODE_REG060H_CVBS); - au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, - AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_525 | - AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_63_492 | - AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_MN); - au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, - AU8522_TVDEC_FORMAT_CTRL2_REG062H_STD_NTSC); + + if (state->std == V4L2_STD_PAL_M) { + au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, + AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_525 | + AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_63_492 | + AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_AUTO); + au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, + AU8522_TVDEC_FORMAT_CTRL2_REG062H_STD_PAL_M); + } else { + /* NTSC */ + au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL1_REG061H, + AU8522_TVDEC_FORMAT_CTRL1_REG061H_FIELD_LEN_525 | + AU8522_TVDEC_FORMAT_CTRL1_REG061H_LINE_LEN_63_492 | + AU8522_TVDEC_FORMAT_CTRL1_REG061H_SUBCARRIER_NTSC_MN); + au8522_writereg(state, AU8522_TVDEC_FORMAT_CTRL2_REG062H, + AU8522_TVDEC_FORMAT_CTRL2_REG062H_STD_NTSC); + } au8522_writereg(state, AU8522_TVDEC_VCR_DET_LLIM_REG063H, AU8522_TVDEC_VCR_DET_LLIM_REG063H_CVBS); au8522_writereg(state, AU8522_TVDEC_VCR_DET_HLIM_REG064H, @@ -276,8 +283,7 @@ AU8522_TVDEC_COMB_HDIF_THR2_REG06AH_CVBS); au8522_writereg(state, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH, AU8522_TVDEC_COMB_HDIF_THR3_REG06BH_CVBS); - if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 || - input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) { + if (is_svideo) { au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH, AU8522_TVDEC_COMB_DCDIF_THR1_REG06CH_SVIDEO); au8522_writereg(state, AU8522_TVDEC_COMB_DCDIF_THR2_REG06DH, @@ -318,8 +324,7 @@ setup_vbi(state, 0); - if (input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13 || - input_mode == AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24) { + if (is_svideo) { /* Despite what the table says, for the HVR-950q we still need to be in CVBS mode for the S-Video input (reason unknown). */ /* filter_coef_type = 3; */ @@ -347,7 +352,7 @@ au8522_writereg(state, AU8522_REG436H, 0x3c); } -static void au8522_setup_cvbs_mode(struct au8522_state *state) +static void au8522_setup_cvbs_mode(struct au8522_state *state, u8 input_mode) { /* here we're going to try the pre-programmed route */ au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H, @@ -359,16 +364,16 @@ /* Enable clamping control */ au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); - au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, - AU8522_INPUT_CONTROL_REG081H_CVBS_CH1); + au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); - setup_decoder_defaults(state, AU8522_INPUT_CONTROL_REG081H_CVBS_CH1); + setup_decoder_defaults(state, false); au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); } -static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state) +static void au8522_setup_cvbs_tuner_mode(struct au8522_state *state, + u8 input_mode) { /* here we're going to try the pre-programmed route */ au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H, @@ -385,24 +390,22 @@ au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x10); /* Set input mode to CVBS on channel 4 with SIF audio input enabled */ - au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, - AU8522_INPUT_CONTROL_REG081H_CVBS_CH4_SIF); + au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); - setup_decoder_defaults(state, - AU8522_INPUT_CONTROL_REG081H_CVBS_CH4_SIF); + setup_decoder_defaults(state, false); au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); } -static void au8522_setup_svideo_mode(struct au8522_state *state) +static void au8522_setup_svideo_mode(struct au8522_state *state, + u8 input_mode) { au8522_writereg(state, AU8522_MODULE_CLOCK_CONTROL_REG0A3H, AU8522_MODULE_CLOCK_CONTROL_REG0A3H_SVIDEO); /* Set input to Y on Channe1, C on Channel 3 */ - au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, - AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13); + au8522_writereg(state, AU8522_INPUT_CONTROL_REG081H, input_mode); /* PGA in automatic mode */ au8522_writereg(state, AU8522_PGA_CONTROL_REG082H, 0x00); @@ -410,8 +413,7 @@ /* Enable clamping control */ au8522_writereg(state, AU8522_CLAMPING_CONTROL_REG083H, 0x00); - setup_decoder_defaults(state, - AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13); + setup_decoder_defaults(state, true); au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); @@ -433,8 +435,9 @@ } /* 0=disable, 1=SIF */ -static void set_audio_input(struct au8522_state *state, int aud_input) +static void set_audio_input(struct au8522_state *state) { + int aud_input = state->aud_input; int i; /* Note that this function needs to be used in conjunction with setting @@ -466,8 +469,9 @@ au8522_writereg(state, AU8522_I2C_CONTROL_REG0_REG090H, 0x84); msleep(150); au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x00); - msleep(1); - au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x9d); + msleep(10); + au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, + AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); msleep(50); au8522_writereg(state, AU8522_AUDIO_VOLUME_L_REG0F2H, 0x7F); au8522_writereg(state, AU8522_AUDIO_VOLUME_R_REG0F3H, 0x7F); @@ -524,13 +528,8 @@ static int au8522_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) { - struct i2c_client *client = v4l2_get_subdevdata(sd); struct au8522_state *state = to_state(sd); - if (!v4l2_chip_match_i2c_client(client, ®->match)) - return -EINVAL; - if (!capable(CAP_SYS_ADMIN)) - return -EPERM; reg->val = au8522_readreg(state, reg->reg & 0xffff); return 0; } @@ -538,70 +537,116 @@ static int au8522_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg) { - struct i2c_client *client = v4l2_get_subdevdata(sd); struct au8522_state *state = to_state(sd); - if (!v4l2_chip_match_i2c_client(client, ®->match)) - return -EINVAL; - if (!capable(CAP_SYS_ADMIN)) - return -EPERM; au8522_writereg(state, reg->reg, reg->val & 0xff); return 0; } #endif +static void au8522_video_set(struct au8522_state *state) +{ + u8 input_mode; + + au8522_writereg(state, 0xa4, 1 << 5); + + switch (state->vid_input) { + case AU8522_COMPOSITE_CH1: + input_mode = AU8522_INPUT_CONTROL_REG081H_CVBS_CH1; + au8522_setup_cvbs_mode(state, input_mode); + break; + case AU8522_COMPOSITE_CH2: + input_mode = AU8522_INPUT_CONTROL_REG081H_CVBS_CH2; + au8522_setup_cvbs_mode(state, input_mode); + break; + case AU8522_COMPOSITE_CH3: + input_mode = AU8522_INPUT_CONTROL_REG081H_CVBS_CH3; + au8522_setup_cvbs_mode(state, input_mode); + break; + case AU8522_COMPOSITE_CH4: + input_mode = AU8522_INPUT_CONTROL_REG081H_CVBS_CH4; + au8522_setup_cvbs_mode(state, input_mode); + break; + case AU8522_SVIDEO_CH13: + input_mode = AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH13; + au8522_setup_svideo_mode(state, input_mode); + break; + case AU8522_SVIDEO_CH24: + input_mode = AU8522_INPUT_CONTROL_REG081H_SVIDEO_CH24; + au8522_setup_svideo_mode(state, input_mode); + break; + default: + case AU8522_COMPOSITE_CH4_SIF: + input_mode = AU8522_INPUT_CONTROL_REG081H_CVBS_CH4_SIF; + au8522_setup_cvbs_tuner_mode(state, input_mode); + break; + } +} + static int au8522_s_stream(struct v4l2_subdev *sd, int enable) { struct au8522_state *state = to_state(sd); if (enable) { + /* + * Clear out any state associated with the digital side of the + * chip, so that when it gets powered back up it won't think + * that it is already tuned + */ + state->current_frequency = 0; + au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 0x01); - msleep(1); - au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, - AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H_CVBS); + msleep(10); + + au8522_video_set(state); + set_audio_input(state); + + state->operational_mode = AU8522_ANALOG_MODE; } else { /* This does not completely power down the device (it only reduces it from around 140ma to 80ma) */ au8522_writereg(state, AU8522_SYSTEM_MODULE_CONTROL_0_REG0A4H, 1 << 5); + state->operational_mode = AU8522_SUSPEND_MODE; } return 0; } -static int au8522_reset(struct v4l2_subdev *sd, u32 val) +static int au8522_s_video_routing(struct v4l2_subdev *sd, + u32 input, u32 output, u32 config) { struct au8522_state *state = to_state(sd); - state->operational_mode = AU8522_ANALOG_MODE; - - /* Clear out any state associated with the digital side of the - chip, so that when it gets powered back up it won't think - that it is already tuned */ - state->current_frequency = 0; + switch(input) { + case AU8522_COMPOSITE_CH1: + case AU8522_SVIDEO_CH13: + case AU8522_COMPOSITE_CH4_SIF: + state->vid_input = input; + break; + default: + printk(KERN_ERR "au8522 mode not currently supported\n"); + return -EINVAL; + } - au8522_writereg(state, 0xa4, 1 << 5); + if (state->operational_mode == AU8522_ANALOG_MODE) + au8522_video_set(state); return 0; } -static int au8522_s_video_routing(struct v4l2_subdev *sd, - u32 input, u32 output, u32 config) +static int au8522_s_std(struct v4l2_subdev *sd, v4l2_std_id std) { struct au8522_state *state = to_state(sd); - au8522_reset(sd, 0); - - if (input == AU8522_COMPOSITE_CH1) { - au8522_setup_cvbs_mode(state); - } else if (input == AU8522_SVIDEO_CH13) { - au8522_setup_svideo_mode(state); - } else if (input == AU8522_COMPOSITE_CH4_SIF) { - au8522_setup_cvbs_tuner_mode(state); - } else { - printk(KERN_ERR "au8522 mode not currently supported\n"); + if ((std & (V4L2_STD_PAL_M | V4L2_STD_NTSC_M)) == 0) return -EINVAL; - } + + state->std = std; + + if (state->operational_mode == AU8522_ANALOG_MODE) + au8522_video_set(state); + return 0; } @@ -609,7 +654,12 @@ u32 input, u32 output, u32 config) { struct au8522_state *state = to_state(sd); - set_audio_input(state, input); + + state->aud_input = input; + + if (state->operational_mode == AU8522_ANALOG_MODE) + set_audio_input(state); + return 0; } @@ -636,21 +686,10 @@ return 0; } -static int au8522_g_chip_ident(struct v4l2_subdev *sd, - struct v4l2_dbg_chip_ident *chip) -{ - struct au8522_state *state = to_state(sd); - struct i2c_client *client = v4l2_get_subdevdata(sd); - - return v4l2_chip_ident_i2c_client(client, chip, state->id, state->rev); -} - /* ----------------------------------------------------------------------- */ static const struct v4l2_subdev_core_ops au8522_core_ops = { .log_status = v4l2_ctrl_subdev_log_status, - .g_chip_ident = au8522_g_chip_ident, - .reset = au8522_reset, #ifdef CONFIG_VIDEO_ADV_DEBUG .g_register = au8522_g_register, .s_register = au8522_s_register, @@ -668,6 +707,7 @@ static const struct v4l2_subdev_video_ops au8522_video_ops = { .s_routing = au8522_s_video_routing, .s_stream = au8522_s_stream, + .s_std = au8522_s_std, }; static const struct v4l2_subdev_ops au8522_ops = { @@ -750,6 +790,7 @@ } state->c = client; + state->std = V4L2_STD_NTSC_M; state->vid_input = AU8522_COMPOSITE_CH1; state->aud_input = AU8522_AUDIO_NONE; state->id = 8522; @@ -779,7 +820,6 @@ static struct i2c_driver au8522_driver = { .driver = { - .owner = THIS_MODULE, .name = "au8522", }, .probe = au8522_probe,