--- zzzz-none-000/linux-3.10.107/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/drivers/media/platform/s5p-mfc/s5p_mfc_common.h 2021-02-04 17:41:59.000000000 +0000 @@ -21,9 +21,9 @@ #include #include #include -#include +#include #include "regs-mfc.h" -#include "regs-mfc-v6.h" +#include "regs-mfc-v8.h" /* Definitions related to MFC memory */ @@ -38,6 +38,8 @@ #define MFC_BANK2_ALIGN_ORDER 13 #define MFC_BASE_ALIGN_ORDER 17 +#define MFC_FW_MAX_VERSIONS 2 + #include static inline dma_addr_t s5p_mfc_mem_cookie(void *a, void *b) @@ -64,7 +66,7 @@ #define MFC_ENC_CAP_PLANE_COUNT 1 #define MFC_ENC_OUT_PLANE_COUNT 2 #define STUFF_BYTE 4 -#define MFC_MAX_CTRLS 70 +#define MFC_MAX_CTRLS 77 #define S5P_MFC_CODEC_NONE -1 #define S5P_MFC_CODEC_H264_DEC 0 @@ -80,6 +82,7 @@ #define S5P_MFC_CODEC_H264_MVC_ENC 21 #define S5P_MFC_CODEC_MPEG4_ENC 22 #define S5P_MFC_CODEC_H263_ENC 23 +#define S5P_MFC_CODEC_VP8_ENC 24 #define S5P_MFC_R2H_CMD_EMPTY 0 #define S5P_MFC_R2H_CMD_SYS_INIT_RET 1 @@ -162,6 +165,11 @@ MFC_DEC_RES_CHANGE, }; +enum s5p_mfc_fw_ver { + MFC_FW_V1, + MFC_FW_V2, +}; + #define MFC_BUF_FLAG_USED (1 << 0) #define MFC_BUF_FLAG_EOS (1 << 1) @@ -171,8 +179,8 @@ * struct s5p_mfc_buf - MFC buffer */ struct s5p_mfc_buf { + struct vb2_v4l2_buffer *b; struct list_head list; - struct vb2_buffer *b; union { struct { size_t luma; @@ -221,15 +229,14 @@ struct s5p_mfc_variant { unsigned int version; unsigned int port_num; + u32 version_bit; struct s5p_mfc_buf_size *buf_size; struct s5p_mfc_buf_align *buf_align; - char *fw_name; + char *fw_name[MFC_FW_MAX_VERSIONS]; }; /** * struct s5p_mfc_priv_buf - represents internal used buffer - * @alloc: allocation-specific context for each buffer - * (videobuf2 allocator) * @ofs: offset of each buffer, will be used for MFC * @virt: kernel virtual address, only valid when the * buffer accessed by driver @@ -237,7 +244,6 @@ * @size: size of the buffer */ struct s5p_mfc_priv_buf { - void *alloc; unsigned long ofs; void *virt; dma_addr_t dma; @@ -285,6 +291,7 @@ * @warn_start: hardware error code from which warnings start * @mfc_ops: ops structure holding HW operation function pointers * @mfc_cmds: cmd structure holding HW commands function pointers + * @fw_ver: loaded firmware sub-version * */ struct s5p_mfc_dev { @@ -328,6 +335,9 @@ int warn_start; struct s5p_mfc_hw_ops *mfc_ops; struct s5p_mfc_hw_cmds *mfc_cmds; + const struct s5p_mfc_regs *mfc_regs; + enum s5p_mfc_fw_ver fw_ver; + bool risc_on; /* indicates if RISC is on or off */ }; /** @@ -399,11 +409,33 @@ }; /** + * struct s5p_mfc_vp8_enc_params - encoding parameters for vp8 + */ +struct s5p_mfc_vp8_enc_params { + u8 imd_4x4; + enum v4l2_vp8_num_partitions num_partitions; + enum v4l2_vp8_num_ref_frames num_ref; + u8 filter_level; + u8 filter_sharpness; + u32 golden_frame_ref_period; + enum v4l2_vp8_golden_frame_sel golden_frame_sel; + u8 hier_layer; + u8 hier_layer_qp[3]; + u8 rc_min_qp; + u8 rc_max_qp; + u8 rc_frame_qp; + u8 rc_p_frame_qp; + u8 profile; +}; + +/** * struct s5p_mfc_enc_params - general encoding parameters */ struct s5p_mfc_enc_params { u16 width; u16 height; + u32 mv_h_range; + u32 mv_v_range; u16 gop_size; enum v4l2_mpeg_video_multi_slice_mode slice_mode; @@ -432,6 +464,7 @@ struct { struct s5p_mfc_h264_enc_params h264; struct s5p_mfc_mpeg4_enc_params mpeg4; + struct s5p_mfc_vp8_enc_params vp8; } codec; }; @@ -638,6 +671,7 @@ u32 codec_mode; enum s5p_mfc_fmt_type type; u32 num_planes; + u32 versions; }; /** @@ -662,6 +696,12 @@ #define s5p_mfc_hw_call(f, op, args...) \ ((f && f->op) ? f->op(args) : -ENODEV) +#define s5p_mfc_hw_call_void(f, op, args...) \ +do { \ + if (f && f->op) \ + f->op(args); \ +} while (0) + #define fh_to_ctx(__fh) container_of(__fh, struct s5p_mfc_ctx, fh) #define ctrl_to_ctx(__ctrl) \ container_of((__ctrl)->handler, struct s5p_mfc_ctx, ctrl_handler) @@ -674,6 +714,14 @@ #define HAS_PORTNUM(dev) (dev ? (dev->variant ? \ (dev->variant->port_num ? 1 : 0) : 0) : 0) #define IS_TWOPORT(dev) (dev->variant->port_num == 2 ? 1 : 0) -#define IS_MFCV6(dev) (dev->variant->version >= 0x60 ? 1 : 0) +#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0) +#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0) +#define IS_MFCV8(dev) (dev->variant->version >= 0x80 ? 1 : 0) + +#define MFC_V5_BIT BIT(0) +#define MFC_V6_BIT BIT(1) +#define MFC_V7_BIT BIT(2) +#define MFC_V8_BIT BIT(3) + #endif /* S5P_MFC_COMMON_H_ */