--- zzzz-none-000/linux-3.10.107/drivers/media/usb/cx231xx/cx231xx-avcore.c 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/drivers/media/usb/cx231xx/cx231xx-avcore.c 2021-02-04 17:41:59.000000000 +0000 @@ -22,12 +22,12 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +#include "cx231xx.h" #include #include #include #include #include -#include #include #include #include @@ -35,9 +35,7 @@ #include #include -#include -#include "cx231xx.h" #include "cx231xx-dif.h" #define TUNER_MODE_FM_RADIO 0 @@ -84,10 +82,10 @@ cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0); verve_read_byte(dev, 0x07, &val); - cx231xx_info(" verve_read_byte address0x07=0x%x\n", val); + dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); verve_write_byte(dev, 0x07, 0xF4); verve_read_byte(dev, 0x07, &val); - cx231xx_info(" verve_read_byte address0x07=0x%x\n", val); + dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); cx231xx_capture_start(dev, 1, Vbi); @@ -157,22 +155,25 @@ while (afe_power_status != 0x18) { status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18); if (status < 0) { - cx231xx_info( - ": Init Super Block failed in send cmd\n"); + dev_dbg(dev->dev, + "%s: Init Super Block failed in send cmd\n", + __func__); break; } status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status); afe_power_status &= 0xff; if (status < 0) { - cx231xx_info( - ": Init Super Block failed in receive cmd\n"); + dev_dbg(dev->dev, + "%s: Init Super Block failed in receive cmd\n", + __func__); break; } i++; if (i == 10) { - cx231xx_info( - ": Init Super Block force break in loop !!!!\n"); + dev_dbg(dev->dev, + "%s: Init Super Block force break in loop !!!!\n", + __func__); status = -1; break; } @@ -353,6 +354,7 @@ case CX231XX_BOARD_CNXT_RDU_253S: case CX231XX_BOARD_CNXT_VIDEO_GRABBER: case CX231XX_BOARD_HAUPPAUGE_EXETER: + case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: case CX231XX_BOARD_HAUPPAUGE_USBLIVE2: case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: @@ -410,7 +412,7 @@ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00); } else { - cx231xx_info("Invalid AV mode input\n"); + dev_dbg(dev->dev, "Invalid AV mode input\n"); status = -1; } break; @@ -467,7 +469,7 @@ status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x40); } else { - cx231xx_info("Invalid AV mode input\n"); + dev_dbg(dev->dev, "Invalid AV mode input\n"); status = -1; } } /* switch */ @@ -573,9 +575,9 @@ status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ENXTERNAL_AV); if (status < 0) { - cx231xx_errdev("%s: set_power_mode : Failed to" - " set Power - errCode [%d]!\n", - __func__, status); + dev_err(dev->dev, + "%s: Failed to set Power - errCode [%d]!\n", + __func__, status); return status; } } @@ -591,8 +593,8 @@ status = cx231xx_set_power_mode(dev, POLARIS_AVMODE_ANALOGT_TV); if (status < 0) { - cx231xx_errdev("%s: set_power_mode:Failed" - " to set Power - errCode [%d]!\n", + dev_err(dev->dev, + "%s: Failed to set Power - errCode [%d]!\n", __func__, status); return status; } @@ -608,8 +610,8 @@ break; default: - cx231xx_errdev("%s: set_power_mode : Unknown Input %d !\n", - __func__, INPUT(input)->type); + dev_err(dev->dev, "%s: Unknown Input %d !\n", + __func__, INPUT(input)->type); break; } @@ -628,8 +630,8 @@ if (pin_type != dev->video_input) { status = cx231xx_afe_adjust_ref_count(dev, pin_type); if (status < 0) { - cx231xx_errdev("%s: adjust_ref_count :Failed to set" - "AFE input mux - errCode [%d]!\n", + dev_err(dev->dev, + "%s: adjust_ref_count :Failed to set AFE input mux - errCode [%d]!\n", __func__, status); return status; } @@ -638,9 +640,9 @@ /* call afe block to set video inputs */ status = cx231xx_afe_set_input_mux(dev, input); if (status < 0) { - cx231xx_errdev("%s: set_input_mux :Failed to set" - " AFE input mux - errCode [%d]!\n", - __func__, status); + dev_err(dev->dev, + "%s: set_input_mux :Failed to set AFE input mux - errCode [%d]!\n", + __func__, status); return status; } @@ -670,8 +672,8 @@ /* Tell DIF object to go to baseband mode */ status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); if (status < 0) { - cx231xx_errdev("%s: cx231xx_dif set to By pass" - " mode- errCode [%d]!\n", + dev_err(dev->dev, + "%s: cx231xx_dif set to By pass mode- errCode [%d]!\n", __func__, status); return status; } @@ -715,8 +717,8 @@ /* Tell DIF object to go to baseband mode */ status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); if (status < 0) { - cx231xx_errdev("%s: cx231xx_dif set to By pass" - " mode- errCode [%d]!\n", + dev_err(dev->dev, + "%s: cx231xx_dif set to By pass mode- errCode [%d]!\n", __func__, status); return status; } @@ -790,9 +792,9 @@ status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); if (status < 0) { - cx231xx_errdev("%s: cx231xx_dif set to By pass" - " mode- errCode [%d]!\n", - __func__, status); + dev_err(dev->dev, + "%s: cx231xx_dif set to By pass mode- errCode [%d]!\n", + __func__, status); return status; } @@ -826,9 +828,9 @@ /* Reinitialize the DIF */ status = cx231xx_dif_set_standard(dev, dev->norm); if (status < 0) { - cx231xx_errdev("%s: cx231xx_dif set to By pass" - " mode- errCode [%d]!\n", - __func__, status); + dev_err(dev->dev, + "%s: cx231xx_dif set to By pass mode- errCode [%d]!\n", + __func__, status); return status; } @@ -970,14 +972,14 @@ { int status = 0; - cx231xx_info("do_mode_ctrl_overrides : 0x%x\n", - (unsigned int)dev->norm); + dev_dbg(dev->dev, "%s: 0x%x\n", + __func__, (unsigned int)dev->norm); /* Change the DFE_CTRL3 bp_percent to fix flagging */ status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280); if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) { - cx231xx_info("do_mode_ctrl_overrides NTSC\n"); + dev_dbg(dev->dev, "%s: NTSC\n", __func__); /* Move the close caption lines out of active video, adjust the active video start point */ @@ -1004,7 +1006,7 @@ (FLD_HBLANK_CNT, 0x79)); } else if (dev->norm & V4L2_STD_SECAM) { - cx231xx_info("do_mode_ctrl_overrides SECAM\n"); + dev_dbg(dev->dev, "%s: SECAM\n", __func__); status = cx231xx_read_modify_write_i2c_dword(dev, VID_BLK_I2C_ADDRESS, VERT_TIM_CTRL, @@ -1031,7 +1033,7 @@ cx231xx_set_field (FLD_HBLANK_CNT, 0x85)); } else { - cx231xx_info("do_mode_ctrl_overrides PAL\n"); + dev_dbg(dev->dev, "%s: PAL\n", __func__); status = cx231xx_read_modify_write_i2c_dword(dev, VID_BLK_I2C_ADDRESS, VERT_TIM_CTRL, @@ -1206,7 +1208,8 @@ /* This is just a casual suggestion to people adding new boards in case they use a tuner type we don't currently know about */ - printk(KERN_INFO "Unknown tuner type configuring SIF"); + dev_info(dev->dev, + "Unknown tuner type configuring SIF"); break; } break; @@ -1273,8 +1276,13 @@ int status = 0; bool current_is_port_3; - if (dev->board.dont_use_port_3) - is_port_3 = false; + /* + * Should this code check dev->port_3_switch_enabled first + * to skip unnecessary reading of the register? + * If yes, the flag dev->port_3_switch_enabled must be initialized + * correctly. + */ + status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4); if (status < 0) @@ -1291,12 +1299,13 @@ else value[0] &= ~I2C_DEMOD_EN; - cx231xx_info("Changing the i2c master port to %d\n", - is_port_3 ? 3 : 1); - status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, value, 4); + /* remember status of the switch for usage in is_tuner */ + if (status >= 0) + dev->port_3_switch_enabled = is_port_3; + return status; } @@ -1328,113 +1337,131 @@ for (i = 0x100; i < 0x140; i++) { vid_blk_read_word(dev, i, &value); - cx231xx_info("reg0x%x=0x%x\n", i, value); + dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); i = i+3; } for (i = 0x300; i < 0x400; i++) { vid_blk_read_word(dev, i, &value); - cx231xx_info("reg0x%x=0x%x\n", i, value); + dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); i = i+3; } for (i = 0x400; i < 0x440; i++) { vid_blk_read_word(dev, i, &value); - cx231xx_info("reg0x%x=0x%x\n", i, value); + dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); i = i+3; } vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); - cx231xx_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); + dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390); vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); - cx231xx_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); + dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); } -void cx231xx_dump_SC_reg(struct cx231xx *dev) +#if 0 +static void cx231xx_dump_SC_reg(struct cx231xx *dev) { u8 value[4] = { 0, 0, 0, 0 }; - cx231xx_info("cx231xx_dump_SC_reg!\n"); + dev_dbg(dev->dev, "%s!\n", __func__); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0], - value[1], value[2], value[3]); + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0], + value[1], value[2], value[3]); cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, 4); - cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0], - value[1], value[2], value[3]); - - + dev_dbg(dev->dev, + "reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0], + value[1], value[2], value[3]); } +#endif void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev) @@ -1500,7 +1527,7 @@ u32 standard = 0; u8 value[4] = { 0, 0, 0, 0 }; - cx231xx_info("Enter cx231xx_set_Colibri_For_LowIF()\n"); + dev_dbg(dev->dev, "Enter cx231xx_set_Colibri_For_LowIF()\n"); value[0] = (u8) 0x6F; value[1] = (u8) 0x6F; value[2] = (u8) 0x6F; @@ -1520,7 +1547,7 @@ colibri_carrier_offset = cx231xx_Get_Colibri_CarrierOffset(mode, standard); - cx231xx_info("colibri_carrier_offset=%d, standard=0x%x\n", + dev_dbg(dev->dev, "colibri_carrier_offset=%d, standard=0x%x\n", colibri_carrier_offset, standard); /* Set the band Pass filter for DIF*/ @@ -1554,8 +1581,8 @@ u64 pll_freq_u64 = 0; u32 i = 0; - cx231xx_info("if_freq=%d;spectral_invert=0x%x;mode=0x%x\n", - if_freq, spectral_invert, mode); + dev_dbg(dev->dev, "if_freq=%d;spectral_invert=0x%x;mode=0x%x\n", + if_freq, spectral_invert, mode); if (mode == TUNER_MODE_FM_RADIO) { @@ -1571,35 +1598,34 @@ /*pll_freq_word = 0x3463497;*/ vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); - if (spectral_invert) { - if_freq -= 400000; - /* Enable Spectral Invert*/ - vid_blk_read_word(dev, DIF_MISC_CTRL, - &dif_misc_ctrl_value); - dif_misc_ctrl_value = dif_misc_ctrl_value | 0x00200000; - vid_blk_write_word(dev, DIF_MISC_CTRL, - dif_misc_ctrl_value); - } else { - if_freq += 400000; - /* Disable Spectral Invert*/ - vid_blk_read_word(dev, DIF_MISC_CTRL, - &dif_misc_ctrl_value); - dif_misc_ctrl_value = dif_misc_ctrl_value & 0xFFDFFFFF; - vid_blk_write_word(dev, DIF_MISC_CTRL, - dif_misc_ctrl_value); - } + if (spectral_invert) { + if_freq -= 400000; + /* Enable Spectral Invert*/ + vid_blk_read_word(dev, DIF_MISC_CTRL, + &dif_misc_ctrl_value); + dif_misc_ctrl_value = dif_misc_ctrl_value | 0x00200000; + vid_blk_write_word(dev, DIF_MISC_CTRL, + dif_misc_ctrl_value); + } else { + if_freq += 400000; + /* Disable Spectral Invert*/ + vid_blk_read_word(dev, DIF_MISC_CTRL, + &dif_misc_ctrl_value); + dif_misc_ctrl_value = dif_misc_ctrl_value & 0xFFDFFFFF; + vid_blk_write_word(dev, DIF_MISC_CTRL, + dif_misc_ctrl_value); + } - if_freq = (if_freq/100000)*100000; + if_freq = (if_freq / 100000) * 100000; - if (if_freq < 3000000) - if_freq = 3000000; + if (if_freq < 3000000) + if_freq = 3000000; - if (if_freq > 16000000) - if_freq = 16000000; + if (if_freq > 16000000) + if_freq = 16000000; } - cx231xx_info("Enter IF=%zd\n", - ARRAY_SIZE(Dif_set_array)); + dev_dbg(dev->dev, "Enter IF=%zu\n", ARRAY_SIZE(Dif_set_array)); for (i = 0; i < ARRAY_SIZE(Dif_set_array); i++) { if (Dif_set_array[i].if_freq == if_freq) { vid_blk_write_word(dev, @@ -1711,7 +1737,7 @@ u32 dif_misc_ctrl_value = 0; u32 func_mode = 0; - cx231xx_info("%s: setStandard to %x\n", __func__, standard); + dev_dbg(dev->dev, "%s: setStandard to %x\n", __func__, standard); status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value); if (standard != DIF_USE_BASEBAND) @@ -2114,8 +2140,8 @@ { int status = 0; u32 dwval; - cx231xx_info("cx231xx_tuner_post_channel_change dev->tuner_type =0%d\n", - dev->tuner_type); + dev_dbg(dev->dev, "%s: dev->tuner_type =0%d\n", + __func__, dev->tuner_type); /* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for * SECAM L/B/D standards */ status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); @@ -2216,8 +2242,8 @@ if (dev->power_mode != mode) dev->power_mode = mode; else { - cx231xx_info(" setPowerMode::mode = %d, No Change req.\n", - mode); + dev_dbg(dev->dev, "%s: mode = %d, No Change req.\n", + __func__, mode); return 0; } @@ -2226,7 +2252,7 @@ if (status < 0) return status; - tmp = le32_to_cpu(*((u32 *) value)); + tmp = le32_to_cpu(*((__le32 *) value)); switch (mode) { case POLARIS_AVMODE_ENXTERNAL_AV: @@ -2267,7 +2293,6 @@ case POLARIS_AVMODE_ANALOGT_TV: tmp |= PWR_DEMOD_EN; - tmp |= (I2C_DEMOD_EN); value[0] = (u8) tmp; value[1] = (u8) (tmp >> 8); value[2] = (u8) (tmp >> 16); @@ -2320,9 +2345,6 @@ } if (dev->board.tuner_type != TUNER_ABSENT) { - /* Enable tuner */ - cx231xx_enable_i2c_port_3(dev, true); - /* reset the Tuner */ if (dev->board.tuner_gpio) cx231xx_gpio_set(dev, dev->board.tuner_gpio); @@ -2366,7 +2388,7 @@ } tmp &= (~PWR_AV_MODE); - tmp |= POLARIS_AVMODE_DIGITAL | I2C_DEMOD_EN; + tmp |= POLARIS_AVMODE_DIGITAL; value[0] = (u8) tmp; value[1] = (u8) (tmp >> 8); value[2] = (u8) (tmp >> 16); @@ -2387,15 +2409,6 @@ } if (dev->board.tuner_type != TUNER_ABSENT) { - /* - * Enable tuner - * Hauppauge Exeter seems to need to do something different! - */ - if (dev->model == CX231XX_BOARD_HAUPPAUGE_EXETER) - cx231xx_enable_i2c_port_3(dev, false); - else - cx231xx_enable_i2c_port_3(dev, true); - /* reset the Tuner */ if (dev->board.tuner_gpio) cx231xx_gpio_set(dev, dev->board.tuner_gpio); @@ -2447,7 +2460,7 @@ if (status > 0) return status; - tmp = le32_to_cpu(*((u32 *) value)); + tmp = le32_to_cpu(*((__le32 *) value)); tmp &= (~PWR_MODE_MASK); value[0] = (u8) tmp; @@ -2469,13 +2482,13 @@ u32 tmp = 0; int status = 0; - cx231xx_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask); + dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); if (status < 0) return status; - tmp = le32_to_cpu(*((u32 *) value)); + tmp = le32_to_cpu(*((__le32 *) value)); tmp |= ep_mask; value[0] = (u8) tmp; value[1] = (u8) (tmp >> 8); @@ -2494,13 +2507,13 @@ u32 tmp = 0; int status = 0; - cx231xx_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask); + dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); if (status < 0) return status; - tmp = le32_to_cpu(*((u32 *) value)); + tmp = le32_to_cpu(*((__le32 *) value)); tmp &= (~ep_mask); value[0] = (u8) tmp; value[1] = (u8) (tmp >> 8); @@ -2522,61 +2535,72 @@ if (dev->udev->speed == USB_SPEED_HIGH) { switch (media_type) { case Audio: - cx231xx_info("%s: Audio enter HANC\n", __func__); + dev_dbg(dev->dev, + "%s: Audio enter HANC\n", __func__); status = cx231xx_mode_register(dev, TS_MODE_REG, 0x9300); break; case Vbi: - cx231xx_info("%s: set vanc registers\n", __func__); + dev_dbg(dev->dev, + "%s: set vanc registers\n", __func__); status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300); break; case Sliced_cc: - cx231xx_info("%s: set hanc registers\n", __func__); + dev_dbg(dev->dev, + "%s: set hanc registers\n", __func__); status = cx231xx_mode_register(dev, TS_MODE_REG, 0x1300); break; case Raw_Video: - cx231xx_info("%s: set video registers\n", __func__); + dev_dbg(dev->dev, + "%s: set video registers\n", __func__); status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); break; case TS1_serial_mode: - cx231xx_info("%s: set ts1 registers", __func__); - - if (dev->board.has_417) { - cx231xx_info(" MPEG\n"); - value &= 0xFFFFFFFC; - value |= 0x3; - - status = cx231xx_mode_register(dev, TS_MODE_REG, value); - - val[0] = 0x04; - val[1] = 0xA3; - val[2] = 0x3B; - val[3] = 0x00; - status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, - TS1_CFG_REG, val, 4); - - val[0] = 0x00; - val[1] = 0x08; - val[2] = 0x00; - val[3] = 0x08; - status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, - TS1_LENGTH_REG, val, 4); + dev_dbg(dev->dev, + "%s: set ts1 registers", __func__); - } else { - cx231xx_info(" BDA\n"); - status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101); - status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x010); - } + if (dev->board.has_417) { + dev_dbg(dev->dev, + "%s: MPEG\n", __func__); + value &= 0xFFFFFFFC; + value |= 0x3; + + status = cx231xx_mode_register(dev, + TS_MODE_REG, value); + + val[0] = 0x04; + val[1] = 0xA3; + val[2] = 0x3B; + val[3] = 0x00; + status = cx231xx_write_ctrl_reg(dev, + VRT_SET_REGISTER, + TS1_CFG_REG, val, 4); + + val[0] = 0x00; + val[1] = 0x08; + val[2] = 0x00; + val[3] = 0x08; + status = cx231xx_write_ctrl_reg(dev, + VRT_SET_REGISTER, + TS1_LENGTH_REG, val, 4); + } else { + dev_dbg(dev->dev, "%s: BDA\n", __func__); + status = cx231xx_mode_register(dev, + TS_MODE_REG, 0x101); + status = cx231xx_mode_register(dev, + TS1_CFG_REG, 0x010); + } break; case TS1_parallel_mode: - cx231xx_info("%s: set ts1 parallel mode registers\n", - __func__); + dev_dbg(dev->dev, + "%s: set ts1 parallel mode registers\n", + __func__); status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400); break; @@ -2647,7 +2671,7 @@ { int status = 0; - gpio_val = cpu_to_le32(gpio_val); + gpio_val = (__force u32)cpu_to_le32(gpio_val); status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&gpio_val, 4, 0, 0); return status; @@ -2655,7 +2679,7 @@ static int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u32 *gpio_val) { - u32 tmp; + __le32 tmp; int status = 0; status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 *)&tmp, 4, 0, 1); @@ -2929,8 +2953,9 @@ (nCnt > 0)); if (nCnt == 0) - cx231xx_info("No ACK after %d msec -GPIO I2C failed!", - nInit * 10); + dev_dbg(dev->dev, + "No ACK after %d msec -GPIO I2C failed!", + nInit * 10); /* * readAck