--- zzzz-none-000/linux-3.10.107/sound/soc/codecs/wm8962.c 2017-06-27 09:49:32.000000000 +0000 +++ scorpion-7490-727/linux-3.10.107/sound/soc/codecs/wm8962.c 2021-02-04 17:41:59.000000000 +0000 @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -25,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -51,6 +53,7 @@ /* codec private data */ struct wm8962_priv { + struct wm8962_pdata pdata; struct regmap *regmap; struct snd_soc_codec *codec; @@ -65,6 +68,7 @@ int fll_fref; int fll_fout; + struct mutex dsp2_ena_lock; u16 dsp2_ena; struct delayed_work mic_work; @@ -73,11 +77,9 @@ struct regulator_bulk_data supplies[WM8962_NUM_SUPPLIES]; struct notifier_block disable_nb[WM8962_NUM_SUPPLIES]; -#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) struct input_dev *beep; struct work_struct beep_work; int beep_rate; -#endif #ifdef CONFIG_GPIOLIB struct gpio_chip gpio_chip; @@ -111,7 +113,7 @@ WM8962_REGULATOR_EVENT(6) WM8962_REGULATOR_EVENT(7) -static struct reg_default wm8962_reg[] = { +static const struct reg_default wm8962_reg[] = { { 0, 0x009F }, /* R0 - Left Input volume */ { 1, 0x049F }, /* R1 - Right Input volume */ { 2, 0x0000 }, /* R2 - HPOUTL volume */ @@ -1454,14 +1456,13 @@ static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); static const DECLARE_TLV_DB_SCALE(mixin_tlv, -1500, 300, 0); -static const unsigned int mixinpga_tlv[] = { - TLV_DB_RANGE_HEAD(5), +static const DECLARE_TLV_DB_RANGE(mixinpga_tlv, 0, 1, TLV_DB_SCALE_ITEM(0, 600, 0), 2, 2, TLV_DB_SCALE_ITEM(1300, 1300, 0), 3, 4, TLV_DB_SCALE_ITEM(1800, 200, 0), 5, 5, TLV_DB_SCALE_ITEM(2400, 0, 0), - 6, 7, TLV_DB_SCALE_ITEM(2700, 300, 0), -}; + 6, 7, TLV_DB_SCALE_ITEM(2700, 300, 0) +); static const DECLARE_TLV_DB_SCALE(beep_tlv, -9600, 600, 1); static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); static const DECLARE_TLV_DB_SCALE(st_tlv, -3600, 300, 0); @@ -1469,16 +1470,17 @@ static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); static const DECLARE_TLV_DB_SCALE(hp_tlv, -700, 100, 0); -static const unsigned int classd_tlv[] = { - TLV_DB_RANGE_HEAD(2), +static const DECLARE_TLV_DB_RANGE(classd_tlv, 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), - 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), -}; + 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0) +); static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); static int wm8962_dsp2_write_config(struct snd_soc_codec *codec) { - return regcache_sync_region(codec->control_data, + struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); + + return regcache_sync_region(wm8962->regmap, WM8962_HDBASS_AI_1, WM8962_MAX_REGISTER); } @@ -1549,7 +1551,7 @@ struct snd_ctl_elem_value *ucontrol) { int shift = kcontrol->private_value; - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); ucontrol->value.integer.value[0] = !!(wm8962->dsp2_ena & 1 << shift); @@ -1561,14 +1563,14 @@ struct snd_ctl_elem_value *ucontrol) { int shift = kcontrol->private_value; - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); int old = wm8962->dsp2_ena; int ret = 0; int dsp2_running = snd_soc_read(codec, WM8962_DSP2_POWER_MANAGEMENT) & WM8962_DSP2_ENA; - mutex_lock(&codec->mutex); + mutex_lock(&wm8962->dsp2_ena_lock); if (ucontrol->value.integer.value[0]) wm8962->dsp2_ena |= 1 << shift; @@ -1588,7 +1590,7 @@ } out: - mutex_unlock(&codec->mutex); + mutex_unlock(&wm8962->dsp2_ena_lock); return ret; } @@ -1599,7 +1601,7 @@ static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); int ret; /* Apply the update (if any) */ @@ -1629,7 +1631,7 @@ static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); + struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); int ret; /* Apply the update (if any) */ @@ -1657,16 +1659,16 @@ "Hi-fi", "Application" }; -static const struct soc_enum cap_hpf_mode = - SOC_ENUM_SINGLE(WM8962_ADC_DAC_CONTROL_2, 10, 2, cap_hpf_mode_text); +static SOC_ENUM_SINGLE_DECL(cap_hpf_mode, + WM8962_ADC_DAC_CONTROL_2, 10, cap_hpf_mode_text); static const char *cap_lhpf_mode_text[] = { "LPF", "HPF" }; -static const struct soc_enum cap_lhpf_mode = - SOC_ENUM_SINGLE(WM8962_LHPF1, 1, 2, cap_lhpf_mode_text); +static SOC_ENUM_SINGLE_DECL(cap_lhpf_mode, + WM8962_LHPF1, 1, cap_lhpf_mode_text); static const struct snd_kcontrol_new wm8962_snd_controls[] = { SOC_DOUBLE("Input Mixer Switch", WM8962_INPUT_MIXER_CONTROL_1, 3, 2, 1, 1), @@ -1757,6 +1759,9 @@ WM8962_EQL_B4_GAIN_SHIFT, 31, 0, eq_tlv), SOC_DOUBLE_R_TLV("EQ5 Volume", WM8962_EQ3, WM8962_EQ23, WM8962_EQL_B5_GAIN_SHIFT, 31, 0, eq_tlv), +SND_SOC_BYTES("EQL Coefficients", WM8962_EQ4, 18), +SND_SOC_BYTES("EQR Coefficients", WM8962_EQ24, 18), + SOC_SINGLE("3D Switch", WM8962_THREED1, 0, 1, 0), SND_SOC_BYTES_MASK("3D Coefficients", WM8962_THREED1, 4, WM8962_THREED_ENA), @@ -1774,6 +1779,11 @@ SND_SOC_BYTES("HPF Coefficients", WM8962_LHPF2, 1), WM8962_DSP2_ENABLE("HD Bass Switch", WM8962_HDBASS_ENA_SHIFT), SND_SOC_BYTES("HD Bass Coefficients", WM8962_HDBASS_AI_1, 30), + +SOC_DOUBLE("ALC Switch", WM8962_ALC1, WM8962_ALCL_ENA_SHIFT, + WM8962_ALCR_ENA_SHIFT, 1, 0), +SND_SOC_BYTES_MASK("ALC Coefficients", WM8962_ALC1, 4, + WM8962_ALCL_ENA_MASK | WM8962_ALCR_ENA_MASK), }; static const struct snd_kcontrol_new wm8962_spk_mono_controls[] = { @@ -1844,7 +1854,7 @@ break; default: - BUG(); + WARN(1, "Invalid event %d\n", event); return -EINVAL; } @@ -1854,7 +1864,7 @@ static int hp_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - struct snd_soc_codec *codec = w->codec; + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); int timeout; int reg; int expected = (WM8962_DCS_STARTUP_DONE_HP1L | @@ -1936,7 +1946,7 @@ break; default: - BUG(); + WARN(1, "Invalid event %d\n", event); return -EINVAL; } @@ -1948,7 +1958,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - struct snd_soc_codec *codec = w->codec; + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); int reg; switch (w->shift) { @@ -1965,7 +1975,7 @@ reg = WM8962_SPKOUTL_VOLUME; break; default: - BUG(); + WARN(1, "Invalid shift %d\n", w->shift); return -EINVAL; } @@ -1973,7 +1983,7 @@ case SND_SOC_DAPM_POST_PMU: return snd_soc_write(codec, reg, snd_soc_read(codec, reg)); default: - BUG(); + WARN(1, "Invalid event %d\n", event); return -EINVAL; } } @@ -1981,7 +1991,7 @@ static int dsp2_event(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { - struct snd_soc_codec *codec = w->codec; + struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); switch (event) { @@ -1996,7 +2006,7 @@ break; default: - BUG(); + WARN(1, "Invalid event %d\n", event); return -EINVAL; } @@ -2005,40 +2015,40 @@ static const char *st_text[] = { "None", "Left", "Right" }; -static const struct soc_enum str_enum = - SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_1, 2, 3, st_text); +static SOC_ENUM_SINGLE_DECL(str_enum, + WM8962_DAC_DSP_MIXING_1, 2, st_text); static const struct snd_kcontrol_new str_mux = SOC_DAPM_ENUM("Right Sidetone", str_enum); -static const struct soc_enum stl_enum = - SOC_ENUM_SINGLE(WM8962_DAC_DSP_MIXING_2, 2, 3, st_text); +static SOC_ENUM_SINGLE_DECL(stl_enum, + WM8962_DAC_DSP_MIXING_2, 2, st_text); static const struct snd_kcontrol_new stl_mux = SOC_DAPM_ENUM("Left Sidetone", stl_enum); static const char *outmux_text[] = { "DAC", "Mixer" }; -static const struct soc_enum spkoutr_enum = - SOC_ENUM_SINGLE(WM8962_SPEAKER_MIXER_2, 7, 2, outmux_text); +static SOC_ENUM_SINGLE_DECL(spkoutr_enum, + WM8962_SPEAKER_MIXER_2, 7, outmux_text); static const struct snd_kcontrol_new spkoutr_mux = SOC_DAPM_ENUM("SPKOUTR Mux", spkoutr_enum); -static const struct soc_enum spkoutl_enum = - SOC_ENUM_SINGLE(WM8962_SPEAKER_MIXER_1, 7, 2, outmux_text); +static SOC_ENUM_SINGLE_DECL(spkoutl_enum, + WM8962_SPEAKER_MIXER_1, 7, outmux_text); static const struct snd_kcontrol_new spkoutl_mux = SOC_DAPM_ENUM("SPKOUTL Mux", spkoutl_enum); -static const struct soc_enum hpoutr_enum = - SOC_ENUM_SINGLE(WM8962_HEADPHONE_MIXER_2, 7, 2, outmux_text); +static SOC_ENUM_SINGLE_DECL(hpoutr_enum, + WM8962_HEADPHONE_MIXER_2, 7, outmux_text); static const struct snd_kcontrol_new hpoutr_mux = SOC_DAPM_ENUM("HPOUTR Mux", hpoutr_enum); -static const struct soc_enum hpoutl_enum = - SOC_ENUM_SINGLE(WM8962_HEADPHONE_MIXER_1, 7, 2, outmux_text); +static SOC_ENUM_SINGLE_DECL(hpoutl_enum, + WM8962_HEADPHONE_MIXER_1, 7, outmux_text); static const struct snd_kcontrol_new hpoutl_mux = SOC_DAPM_ENUM("HPOUTL Mux", hpoutl_enum); @@ -2347,12 +2357,13 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec) { - struct wm8962_pdata *pdata = dev_get_platdata(codec->dev); - struct snd_soc_dapm_context *dapm = &codec->dapm; + struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); + struct wm8962_pdata *pdata = &wm8962->pdata; + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); snd_soc_add_codec_controls(codec, wm8962_snd_controls, ARRAY_SIZE(wm8962_snd_controls)); - if (pdata && pdata->spk_mono) + if (pdata->spk_mono) snd_soc_add_codec_controls(codec, wm8962_spk_mono_controls, ARRAY_SIZE(wm8962_spk_mono_controls)); else @@ -2362,7 +2373,7 @@ snd_soc_dapm_new_controls(dapm, wm8962_dapm_widgets, ARRAY_SIZE(wm8962_dapm_widgets)); - if (pdata && pdata->spk_mono) + if (pdata->spk_mono) snd_soc_dapm_new_controls(dapm, wm8962_dapm_spk_mono_widgets, ARRAY_SIZE(wm8962_dapm_spk_mono_widgets)); else @@ -2371,7 +2382,7 @@ snd_soc_dapm_add_routes(dapm, wm8962_intercon, ARRAY_SIZE(wm8962_intercon)); - if (pdata && pdata->spk_mono) + if (pdata->spk_mono) snd_soc_dapm_add_routes(dapm, wm8962_spk_mono_intercon, ARRAY_SIZE(wm8962_spk_mono_intercon)); else @@ -2429,7 +2440,20 @@ snd_soc_update_bits(codec, WM8962_CLOCKING_4, WM8962_SYSCLK_RATE_MASK, clocking4); + /* DSPCLK_DIV can be only generated correctly after enabling SYSCLK. + * So we here provisionally enable it and then disable it afterward + * if current bias_level hasn't reached SND_SOC_BIAS_ON. + */ + if (snd_soc_codec_get_bias_level(codec) != SND_SOC_BIAS_ON) + snd_soc_update_bits(codec, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA_MASK, WM8962_SYSCLK_ENA); + dspclk = snd_soc_read(codec, WM8962_CLOCKING1); + + if (snd_soc_codec_get_bias_level(codec) != SND_SOC_BIAS_ON) + snd_soc_update_bits(codec, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA_MASK, 0); + if (dspclk < 0) { dev_err(codec->dev, "Failed to read DSPCLK: %d\n", dspclk); return; @@ -2484,9 +2508,6 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec, enum snd_soc_bias_level level) { - if (level == codec->dapm.bias_level) - return 0; - switch (level) { case SND_SOC_BIAS_ON: break; @@ -2504,7 +2525,7 @@ snd_soc_update_bits(codec, WM8962_PWR_MGMT_1, WM8962_VMID_SEL_MASK, 0x100); - if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) + if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) msleep(100); break; @@ -2512,7 +2533,6 @@ break; } - codec->dapm.bias_level = level; return 0; } @@ -2563,16 +2583,16 @@ if (wm8962->lrclk % 8000 == 0) adctl3 |= WM8962_SAMPLE_RATE_INT_MODE; - switch (params_format(params)) { - case SNDRV_PCM_FORMAT_S16_LE: + switch (params_width(params)) { + case 16: break; - case SNDRV_PCM_FORMAT_S20_3LE: + case 20: aif0 |= 0x4; break; - case SNDRV_PCM_FORMAT_S24_LE: + case 24: aif0 |= 0x8; break; - case SNDRV_PCM_FORMAT_S32_LE: + case 32: aif0 |= 0xc; break; default: @@ -2588,7 +2608,7 @@ dev_dbg(codec->dev, "hw_params set BCLK %dHz LRCLK %dHz\n", wm8962->bclk, wm8962->lrclk); - if (codec->dapm.bias_level == SND_SOC_BIAS_ON) + if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) wm8962_configure_bclk(codec); return 0; @@ -2619,8 +2639,6 @@ wm8962->sysclk_rate = freq; - wm8962_configure_bclk(codec); - return 0; } @@ -2863,9 +2881,13 @@ snd_soc_write(codec, WM8962_FLL_CONTROL_7, fll_div.lambda); snd_soc_write(codec, WM8962_FLL_CONTROL_8, fll_div.n); - try_wait_for_completion(&wm8962->fll_lock); + reinit_completion(&wm8962->fll_lock); - pm_runtime_get_sync(codec->dev); + ret = pm_runtime_get_sync(codec->dev); + if (ret < 0) { + dev_err(codec->dev, "Failed to resume device: %d\n", ret); + return ret; + } snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, WM8962_FLL_FRAC | WM8962_FLL_REFCLK_SRC_MASK | @@ -2873,8 +2895,6 @@ dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); - ret = 0; - /* This should be a massive overestimate but go even * higher if we'll error out */ @@ -2888,14 +2908,17 @@ if (timeout == 0 && wm8962->irq) { dev_err(codec->dev, "FLL lock timed out"); - ret = -ETIMEDOUT; + snd_soc_update_bits(codec, WM8962_FLL_CONTROL_1, + WM8962_FLL_ENA, 0); + pm_runtime_put(codec->dev); + return -ETIMEDOUT; } wm8962->fll_fref = Fref; wm8962->fll_fout = Fout; wm8962->fll_src = source; - return ret; + return 0; } static int wm8962_mute(struct snd_soc_dai *dai, int mute) @@ -2921,7 +2944,8 @@ WM8962_DAC_MUTE, val); } -#define WM8962_RATES SNDRV_PCM_RATE_8000_96000 +#define WM8962_RATES (SNDRV_PCM_RATE_8000_48000 |\ + SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) #define WM8962_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) @@ -2991,9 +3015,16 @@ unsigned int active; int reg, ret; + ret = pm_runtime_get_sync(dev); + if (ret < 0) { + dev_err(dev, "Failed to resume: %d\n", ret); + return IRQ_NONE; + } + ret = regmap_read(wm8962->regmap, WM8962_INTERRUPT_STATUS_2_MASK, &mask); if (ret != 0) { + pm_runtime_put(dev); dev_err(dev, "Failed to read interrupt mask: %d\n", ret); return IRQ_NONE; @@ -3001,14 +3032,17 @@ ret = regmap_read(wm8962->regmap, WM8962_INTERRUPT_STATUS_2, &active); if (ret != 0) { + pm_runtime_put(dev); dev_err(dev, "Failed to read interrupt: %d\n", ret); return IRQ_NONE; } active &= ~mask; - if (!active) + if (!active) { + pm_runtime_put(dev); return IRQ_NONE; + } /* Acknowledge the interrupts */ ret = regmap_write(wm8962->regmap, WM8962_INTERRUPT_STATUS_2, active); @@ -3053,10 +3087,13 @@ pm_wakeup_event(dev, 300); - schedule_delayed_work(&wm8962->mic_work, - msecs_to_jiffies(250)); + queue_delayed_work(system_power_efficient_wq, + &wm8962->mic_work, + msecs_to_jiffies(250)); } + pm_runtime_put(dev); + return IRQ_HANDLED; } @@ -3076,6 +3113,7 @@ int wm8962_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) { struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); int irq_mask, enable; wm8962->jack = jack; @@ -3096,19 +3134,22 @@ snd_soc_jack_report(wm8962->jack, 0, SND_JACK_MICROPHONE | SND_JACK_BTN_0); + snd_soc_dapm_mutex_lock(dapm); + if (jack) { - snd_soc_dapm_force_enable_pin(&codec->dapm, "SYSCLK"); - snd_soc_dapm_force_enable_pin(&codec->dapm, "MICBIAS"); + snd_soc_dapm_force_enable_pin_unlocked(dapm, "SYSCLK"); + snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS"); } else { - snd_soc_dapm_disable_pin(&codec->dapm, "SYSCLK"); - snd_soc_dapm_disable_pin(&codec->dapm, "MICBIAS"); + snd_soc_dapm_disable_pin_unlocked(dapm, "SYSCLK"); + snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS"); } + snd_soc_dapm_mutex_unlock(dapm); + return 0; } EXPORT_SYMBOL_GPL(wm8962_mic_detect); -#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) static int beep_rates[] = { 500, 1000, 2000, 4000, }; @@ -3118,7 +3159,7 @@ struct wm8962_priv *wm8962 = container_of(work, struct wm8962_priv, beep_work); struct snd_soc_codec *codec = wm8962->codec; - struct snd_soc_dapm_context *dapm = &codec->dapm; + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); int i; int reg = 0; int best = 0; @@ -3182,7 +3223,7 @@ long int time; int ret; - ret = strict_strtol(buf, 10, &time); + ret = kstrtol(buf, 10, &time); if (ret != 0) return ret; @@ -3240,17 +3281,8 @@ snd_soc_update_bits(codec, WM8962_BEEP_GENERATOR_1, WM8962_BEEP_ENA,0); } -#else -static void wm8962_init_beep(struct snd_soc_codec *codec) -{ -} - -static void wm8962_free_beep(struct snd_soc_codec *codec) -{ -} -#endif -static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio) +static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio) { int mask = 0; int val = 0; @@ -3271,8 +3303,8 @@ } if (mask) - snd_soc_update_bits(codec, WM8962_ANALOGUE_CLOCKING1, - mask, val); + regmap_update_bits(wm8962->regmap, WM8962_ANALOGUE_CLOCKING1, + mask, val); } #ifdef CONFIG_GPIOLIB @@ -3284,7 +3316,6 @@ static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) { struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); - struct snd_soc_codec *codec = wm8962->codec; /* The WM8962 GPIOs aren't linearly numbered. For simplicity * we export linear numbers and error out if the unsupported @@ -3300,7 +3331,7 @@ return -EINVAL; } - wm8962_set_gpio_mode(codec, offset + 1); + wm8962_set_gpio_mode(wm8962, offset + 1); return 0; } @@ -3344,14 +3375,14 @@ static void wm8962_init_gpio(struct snd_soc_codec *codec) { struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); - struct wm8962_pdata *pdata = dev_get_platdata(codec->dev); + struct wm8962_pdata *pdata = &wm8962->pdata; int ret; wm8962->gpio_chip = wm8962_template_chip; wm8962->gpio_chip.ngpio = WM8962_MAX_GPIO; wm8962->gpio_chip.dev = codec->dev; - if (pdata && pdata->gpio_base) + if (pdata->gpio_base) wm8962->gpio_chip.base = pdata->gpio_base; else wm8962->gpio_chip.base = -1; @@ -3364,11 +3395,8 @@ static void wm8962_free_gpio(struct snd_soc_codec *codec) { struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); - int ret; - ret = gpiochip_remove(&wm8962->gpio_chip); - if (ret != 0) - dev_err(codec->dev, "Failed to remove GPIOs: %d\n", ret); + gpiochip_remove(&wm8962->gpio_chip); } #else static void wm8962_init_gpio(struct snd_soc_codec *codec) @@ -3382,20 +3410,13 @@ static int wm8962_probe(struct snd_soc_codec *codec) { + struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); int ret; struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); - struct wm8962_pdata *pdata = dev_get_platdata(codec->dev); - int i, trigger, irq_pol; + int i; bool dmicclk, dmicdat; wm8962->codec = codec; - codec->control_data = wm8962->regmap; - - ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); - if (ret != 0) { - dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); - return ret; - } wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0; wm8962->disable_nb[1].notifier_call = wm8962_regulator_event_1; @@ -3417,77 +3438,6 @@ } } - /* SYSCLK defaults to on; make sure it is off so we can safely - * write to registers if the device is declocked. - */ - snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); - - /* Ensure we have soft control over all registers */ - snd_soc_update_bits(codec, WM8962_CLOCKING2, - WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); - - /* Ensure that the oscillator and PLLs are disabled */ - snd_soc_update_bits(codec, WM8962_PLL2, - WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, - 0); - - if (pdata) { - /* Apply static configuration for GPIOs */ - for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) - if (pdata->gpio_init[i]) { - wm8962_set_gpio_mode(codec, i + 1); - snd_soc_write(codec, 0x200 + i, - pdata->gpio_init[i] & 0xffff); - } - - /* Put the speakers into mono mode? */ - if (pdata->spk_mono) - snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_2, - WM8962_SPK_MONO_MASK, WM8962_SPK_MONO); - - - /* Micbias setup, detection enable and detection - * threasholds. */ - if (pdata->mic_cfg) - snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_4, - WM8962_MICDET_ENA | - WM8962_MICDET_THR_MASK | - WM8962_MICSHORT_THR_MASK | - WM8962_MICBIAS_LVL, - pdata->mic_cfg); - } - - /* Latch volume update bits */ - snd_soc_update_bits(codec, WM8962_LEFT_INPUT_VOLUME, - WM8962_IN_VU, WM8962_IN_VU); - snd_soc_update_bits(codec, WM8962_RIGHT_INPUT_VOLUME, - WM8962_IN_VU, WM8962_IN_VU); - snd_soc_update_bits(codec, WM8962_LEFT_ADC_VOLUME, - WM8962_ADC_VU, WM8962_ADC_VU); - snd_soc_update_bits(codec, WM8962_RIGHT_ADC_VOLUME, - WM8962_ADC_VU, WM8962_ADC_VU); - snd_soc_update_bits(codec, WM8962_LEFT_DAC_VOLUME, - WM8962_DAC_VU, WM8962_DAC_VU); - snd_soc_update_bits(codec, WM8962_RIGHT_DAC_VOLUME, - WM8962_DAC_VU, WM8962_DAC_VU); - snd_soc_update_bits(codec, WM8962_SPKOUTL_VOLUME, - WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); - snd_soc_update_bits(codec, WM8962_SPKOUTR_VOLUME, - WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); - snd_soc_update_bits(codec, WM8962_HPOUTL_VOLUME, - WM8962_HPOUT_VU, WM8962_HPOUT_VU); - snd_soc_update_bits(codec, WM8962_HPOUTR_VOLUME, - WM8962_HPOUT_VU, WM8962_HPOUT_VU); - - /* Stereo control for EQ */ - snd_soc_update_bits(codec, WM8962_EQ1, WM8962_EQ_SHARED_COEFF, 0); - - /* Don't debouce interrupts so we don't need SYSCLK */ - snd_soc_update_bits(codec, WM8962_IRQ_DEBOUNCE, - WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | - WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, - 0); - wm8962_add_widgets(codec); /* Save boards having to disable DMIC when not in use */ @@ -3508,7 +3458,7 @@ } if (!dmicclk || !dmicdat) { dev_dbg(codec->dev, "DMIC not in use, disabling\n"); - snd_soc_dapm_nc_pin(&codec->dapm, "DMICDAT"); + snd_soc_dapm_nc_pin(dapm, "DMICDAT"); } if (dmicclk != dmicdat) dev_warn(codec->dev, "DMIC GPIOs partially configured\n"); @@ -3516,36 +3466,6 @@ wm8962_init_beep(codec); wm8962_init_gpio(codec); - if (wm8962->irq) { - if (pdata && pdata->irq_active_low) { - trigger = IRQF_TRIGGER_LOW; - irq_pol = WM8962_IRQ_POL; - } else { - trigger = IRQF_TRIGGER_HIGH; - irq_pol = 0; - } - - snd_soc_update_bits(codec, WM8962_INTERRUPT_CONTROL, - WM8962_IRQ_POL, irq_pol); - - ret = request_threaded_irq(wm8962->irq, NULL, wm8962_irq, - trigger | IRQF_ONESHOT, - "wm8962", codec->dev); - if (ret != 0) { - dev_err(codec->dev, "Failed to request IRQ %d: %d\n", - wm8962->irq, ret); - wm8962->irq = 0; - /* Non-fatal */ - } else { - /* Enable some IRQs by default */ - snd_soc_update_bits(codec, - WM8962_INTERRUPT_STATUS_2_MASK, - WM8962_FLL_LOCK_EINT | - WM8962_TEMP_SHUT_EINT | - WM8962_FIFOS_ERR_EINT, 0); - } - } - return 0; } @@ -3554,9 +3474,6 @@ struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); int i; - if (wm8962->irq) - free_irq(wm8962->irq, codec); - cancel_delayed_work_sync(&wm8962->mic_work); wm8962_free_gpio(codec); @@ -3577,7 +3494,7 @@ }; /* Improve power consumption for IN4 DC measurement mode */ -static const struct reg_default wm8962_dc_measure[] = { +static const struct reg_sequence wm8962_dc_measure[] = { { 0xfd, 0x1 }, { 0xcc, 0x40 }, { 0xfd, 0 }, @@ -3595,25 +3512,73 @@ .cache_type = REGCACHE_RBTREE, }; +static int wm8962_set_pdata_from_of(struct i2c_client *i2c, + struct wm8962_pdata *pdata) +{ + const struct device_node *np = i2c->dev.of_node; + u32 val32; + int i; + + if (of_property_read_bool(np, "spk-mono")) + pdata->spk_mono = true; + + if (of_property_read_u32(np, "mic-cfg", &val32) >= 0) + pdata->mic_cfg = val32; + + if (of_property_read_u32_array(np, "gpio-cfg", pdata->gpio_init, + ARRAY_SIZE(pdata->gpio_init)) >= 0) + for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) { + /* + * The range of GPIO register value is [0x0, 0xffff] + * While the default value of each register is 0x0 + * Any other value will be regarded as default value + */ + if (pdata->gpio_init[i] > 0xffff) + pdata->gpio_init[i] = 0x0; + } + + pdata->mclk = devm_clk_get(&i2c->dev, NULL); + + return 0; +} + static int wm8962_i2c_probe(struct i2c_client *i2c, const struct i2c_device_id *id) { struct wm8962_pdata *pdata = dev_get_platdata(&i2c->dev); struct wm8962_priv *wm8962; unsigned int reg; - int ret, i; + int ret, i, irq_pol, trigger; - wm8962 = devm_kzalloc(&i2c->dev, sizeof(struct wm8962_priv), - GFP_KERNEL); + wm8962 = devm_kzalloc(&i2c->dev, sizeof(*wm8962), GFP_KERNEL); if (wm8962 == NULL) return -ENOMEM; + mutex_init(&wm8962->dsp2_ena_lock); + i2c_set_clientdata(i2c, wm8962); INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work); init_completion(&wm8962->fll_lock); wm8962->irq = i2c->irq; + /* If platform data was supplied, update the default data in priv */ + if (pdata) { + memcpy(&wm8962->pdata, pdata, sizeof(struct wm8962_pdata)); + } else if (i2c->dev.of_node) { + ret = wm8962_set_pdata_from_of(i2c, &wm8962->pdata); + if (ret != 0) + return ret; + } + + /* Mark the mclk pointer to NULL if no mclk assigned */ + if (IS_ERR(wm8962->pdata.mclk)) { + /* But do not ignore the request for probe defer */ + if (PTR_ERR(wm8962->pdata.mclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + wm8962->pdata.mclk = NULL; + } + for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) wm8962->supplies[i].supply = wm8962_supply_names[i]; @@ -3677,7 +3642,78 @@ goto err_enable; } - if (pdata && pdata->in4_dc_measure) { + /* SYSCLK defaults to on; make sure it is off so we can safely + * write to registers if the device is declocked. + */ + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA, 0); + + /* Ensure we have soft control over all registers */ + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, + WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); + + /* Ensure that the oscillator and PLLs are disabled */ + regmap_update_bits(wm8962->regmap, WM8962_PLL2, + WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, + 0); + + /* Apply static configuration for GPIOs */ + for (i = 0; i < ARRAY_SIZE(wm8962->pdata.gpio_init); i++) + if (wm8962->pdata.gpio_init[i]) { + wm8962_set_gpio_mode(wm8962, i + 1); + regmap_write(wm8962->regmap, 0x200 + i, + wm8962->pdata.gpio_init[i] & 0xffff); + } + + + /* Put the speakers into mono mode? */ + if (wm8962->pdata.spk_mono) + regmap_update_bits(wm8962->regmap, WM8962_CLASS_D_CONTROL_2, + WM8962_SPK_MONO_MASK, WM8962_SPK_MONO); + + /* Micbias setup, detection enable and detection + * threasholds. */ + if (wm8962->pdata.mic_cfg) + regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4, + WM8962_MICDET_ENA | + WM8962_MICDET_THR_MASK | + WM8962_MICSHORT_THR_MASK | + WM8962_MICBIAS_LVL, + wm8962->pdata.mic_cfg); + + /* Latch volume update bits */ + regmap_update_bits(wm8962->regmap, WM8962_LEFT_INPUT_VOLUME, + WM8962_IN_VU, WM8962_IN_VU); + regmap_update_bits(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, + WM8962_IN_VU, WM8962_IN_VU); + regmap_update_bits(wm8962->regmap, WM8962_LEFT_ADC_VOLUME, + WM8962_ADC_VU, WM8962_ADC_VU); + regmap_update_bits(wm8962->regmap, WM8962_RIGHT_ADC_VOLUME, + WM8962_ADC_VU, WM8962_ADC_VU); + regmap_update_bits(wm8962->regmap, WM8962_LEFT_DAC_VOLUME, + WM8962_DAC_VU, WM8962_DAC_VU); + regmap_update_bits(wm8962->regmap, WM8962_RIGHT_DAC_VOLUME, + WM8962_DAC_VU, WM8962_DAC_VU); + regmap_update_bits(wm8962->regmap, WM8962_SPKOUTL_VOLUME, + WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); + regmap_update_bits(wm8962->regmap, WM8962_SPKOUTR_VOLUME, + WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); + regmap_update_bits(wm8962->regmap, WM8962_HPOUTL_VOLUME, + WM8962_HPOUT_VU, WM8962_HPOUT_VU); + regmap_update_bits(wm8962->regmap, WM8962_HPOUTR_VOLUME, + WM8962_HPOUT_VU, WM8962_HPOUT_VU); + + /* Stereo control for EQ */ + regmap_update_bits(wm8962->regmap, WM8962_EQ1, + WM8962_EQ_SHARED_COEFF, 0); + + /* Don't debouce interrupts so we don't need SYSCLK */ + regmap_update_bits(wm8962->regmap, WM8962_IRQ_DEBOUNCE, + WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | + WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, + 0); + + if (wm8962->pdata.in4_dc_measure) { ret = regmap_register_patch(wm8962->regmap, wm8962_dc_measure, ARRAY_SIZE(wm8962_dc_measure)); @@ -3687,13 +3723,44 @@ ret); } + if (wm8962->irq) { + if (wm8962->pdata.irq_active_low) { + trigger = IRQF_TRIGGER_LOW; + irq_pol = WM8962_IRQ_POL; + } else { + trigger = IRQF_TRIGGER_HIGH; + irq_pol = 0; + } + + regmap_update_bits(wm8962->regmap, WM8962_INTERRUPT_CONTROL, + WM8962_IRQ_POL, irq_pol); + + ret = devm_request_threaded_irq(&i2c->dev, wm8962->irq, NULL, + wm8962_irq, + trigger | IRQF_ONESHOT, + "wm8962", &i2c->dev); + if (ret != 0) { + dev_err(&i2c->dev, "Failed to request IRQ %d: %d\n", + wm8962->irq, ret); + wm8962->irq = 0; + /* Non-fatal */ + } else { + /* Enable some IRQs by default */ + regmap_update_bits(wm8962->regmap, + WM8962_INTERRUPT_STATUS_2_MASK, + WM8962_FLL_LOCK_EINT | + WM8962_TEMP_SHUT_EINT | + WM8962_FIFOS_ERR_EINT, 0); + } + } + pm_runtime_enable(&i2c->dev); pm_request_idle(&i2c->dev); ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8962, &wm8962_dai, 1); if (ret < 0) - goto err_enable; + goto err_pm_runtime; regcache_cache_only(wm8962->regmap, true); @@ -3702,6 +3769,8 @@ return 0; +err_pm_runtime: + pm_runtime_disable(&i2c->dev); err_enable: regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); err: @@ -3711,15 +3780,22 @@ static int wm8962_i2c_remove(struct i2c_client *client) { snd_soc_unregister_codec(&client->dev); + pm_runtime_disable(&client->dev); return 0; } -#ifdef CONFIG_PM_RUNTIME +#ifdef CONFIG_PM static int wm8962_runtime_resume(struct device *dev) { struct wm8962_priv *wm8962 = dev_get_drvdata(dev); int ret; + ret = clk_prepare_enable(wm8962->pdata.mclk); + if (ret) { + dev_err(dev, "Failed to enable MCLK: %d\n", ret); + return ret; + } + ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); if (ret != 0) { @@ -3732,8 +3808,36 @@ wm8962_reset(wm8962); + regcache_mark_dirty(wm8962->regmap); + + /* SYSCLK defaults to on; make sure it is off so we can safely + * write to registers if the device is declocked. + */ + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA, 0); + + /* Ensure we have soft control over all registers */ + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, + WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); + + /* Ensure that the oscillator and PLLs are disabled */ + regmap_update_bits(wm8962->regmap, WM8962_PLL2, + WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, + 0); + regcache_sync(wm8962->regmap); + regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP, + WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA, + WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA); + + /* Bias enable at 2*5k (fast start-up) */ + regmap_update_bits(wm8962->regmap, WM8962_PWR_MGMT_1, + WM8962_BIAS_ENA | WM8962_VMID_SEL_MASK, + WM8962_BIAS_ENA | 0x180); + + msleep(5); + return 0; } @@ -3753,11 +3857,13 @@ regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies); + clk_disable_unprepare(wm8962->pdata.mclk); + return 0; } #endif -static struct dev_pm_ops wm8962_pm = { +static const struct dev_pm_ops wm8962_pm = { SET_RUNTIME_PM_OPS(wm8962_runtime_suspend, wm8962_runtime_resume, NULL) }; @@ -3776,7 +3882,6 @@ static struct i2c_driver wm8962_i2c_driver = { .driver = { .name = "wm8962", - .owner = THIS_MODULE, .of_match_table = wm8962_of_match, .pm = &wm8962_pm, },