--- zzzz-none-000/linux-4.4.60/arch/mips/kernel/genex.S 2017-04-08 07:53:53.000000000 +0000 +++ scorpion-7490-727/linux-4.4.60/arch/mips/kernel/genex.S 2021-02-04 17:41:59.000000000 +0000 @@ -53,7 +53,7 @@ */ NESTED(except_vec3_r4000, 0, sp) .set push - .set arch=r4000 + .set mips64r2 .set noat mfc0 k1, CP0_CAUSE li k0, 31<<2 @@ -191,6 +191,9 @@ PTR_LA ra, ret_from_irq PTR_LA v0, plat_irq_dispatch jr v0 +#if defined(CONFIG_AVM_SIMPLE_PROFILING) + move a0, sp +#endif /*--- #if defined(CONFIG_AVM_SIMPLE_PROFILING) ---*/ #ifdef CONFIG_CPU_MICROMIPS nop #endif @@ -238,6 +241,9 @@ .set push .set noreorder PTR_LA v1, except_vec_vi_handler +#if defined(CONFIG_AVM_SIMPLE_PROFILING) + move a0, sp +#endif /*--- #if defined(CONFIG_AVM_SIMPLE_PROFILING) ---*/ FEXPORT(except_vec_vi_lui) lui v0, 0 /* Patched */ jr v1 @@ -264,6 +270,9 @@ LONG_L s0, TI_REGS($28) LONG_S sp, TI_REGS($28) PTR_LA ra, ret_from_irq +#if defined(CONFIG_AVM_SIMPLE_PROFILING) + move a0, sp /*--- AVM IRQ ---*/ +#endif /*--- #if defined(CONFIG_AVM_SIMPLE_PROFILING) ---*/ jr v0 END(except_vec_vi_handler) @@ -290,7 +299,7 @@ ejtag_return: MFC0 k0, CP0_DESAVE - .set mips32 + .set mips64r2 deret .set pop END(ejtag_debug_handler) @@ -313,11 +322,26 @@ * unconditional jump to this vector. */ NESTED(except_vec_nmi, 0, sp) +#ifdef CONFIG_QCA_NMI_RESERVE + /* + * The following code will be linked in the kseg0 (0x8xxx_xxxx) range. + * However, it will get executed from kseg2 (0xCxxx_xxxx) range. Hence, + * this has to be position independent. + */ + MTC0 k0, CP0_DESAVE /* Save k0 for nmi_handler */ + la k0, nmi_handler + j k0 + nop +#else j nmi_handler #ifdef CONFIG_CPU_MICROMIPS nop #endif +#endif END(except_vec_nmi) +#ifdef CONFIG_QCA_NMI_RESERVE +EXPORT(except_vec_nmi_end) +#endif __FINIT @@ -334,6 +358,9 @@ and k0, k0, k1 mtc0 k0, CP0_STATUS _ehb +#ifdef CONFIG_QCA_NMI_RESERVE + MFC0 k0, CP0_DESAVE /* Restore k0 saved by except_vec_nmi */ +#endif SAVE_ALL move a0, sp jal nmi_exception_handler @@ -357,7 +384,7 @@ .macro __build_clear_fpe .set push /* gas fails to assemble cfc1 for some archs (octeon).*/ \ - .set mips1 + .set mips64r2 SET_HARDFLOAT cfc1 a1, fcr31 .set pop @@ -527,7 +554,7 @@ ori k1, _THREAD_MASK xori k1, _THREAD_MASK LONG_L v1, TI_TP_VALUE(k1) - .set arch=r4000 + .set mips64r2 eret .set mips0 #endif