--- zzzz-none-000/linux-4.4.60/drivers/pinctrl/qcom/pinctrl-msm.c	2017-04-08 07:53:53.000000000 +0000
+++ scorpion-7490-727/linux-4.4.60/drivers/pinctrl/qcom/pinctrl-msm.c	2021-02-04 17:41:59.000000000 +0000
@@ -1,4 +1,5 @@
 /*
+
  * Copyright (c) 2013, Sony Mobile Communications AB.
  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
  *
@@ -29,7 +30,8 @@
 #include <linux/spinlock.h>
 #include <linux/reboot.h>
 #include <linux/pm.h>
-
+#include <linux/qcom_scm.h>
+#include <linux/io.h>
 #include "../core.h"
 #include "../pinconf.h"
 #include "pinctrl-msm.h"
@@ -190,6 +192,8 @@
 		*mask = 3;
 		break;
 	case PIN_CONFIG_DRIVE_STRENGTH:
+	case PIN_CONFIG_DRIVE_CAP:
+	case PIN_CONFIG_DRIVE_TYPE:
 		*bit = g->drv_bit;
 		*mask = 7;
 		break;
@@ -198,6 +202,18 @@
 		*bit = g->oe_bit;
 		*mask = 1;
 		break;
+	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+		*bit = g->od_bit;
+		*mask = 1;
+		break;
+	case PIN_CONFIG_VM:
+		*bit = g->vm_bit;
+		*mask = 1;
+		break;
+	case PIN_CONFIG_PULL_RES:
+		*bit = g->pull_res;
+		*mask = 3;
+		break;
 	default:
 		return -ENOTSUPP;
 	}
@@ -205,11 +221,6 @@
 	return 0;
 }
 
-#define MSM_NO_PULL	0
-#define MSM_PULL_DOWN	1
-#define MSM_KEEPER	2
-#define MSM_PULL_UP	3
-
 static unsigned msm_regval_to_drive(u32 val)
 {
 	return (val + 1) * 2;
@@ -240,20 +251,23 @@
 	/* Convert register value to pinconf value */
 	switch (param) {
 	case PIN_CONFIG_BIAS_DISABLE:
-		arg = arg == MSM_NO_PULL;
+		arg = arg == pctrl->soc->gpio_pull->no_pull;
 		break;
 	case PIN_CONFIG_BIAS_PULL_DOWN:
-		arg = arg == MSM_PULL_DOWN;
+		arg = arg == pctrl->soc->gpio_pull->pull_down;
 		break;
 	case PIN_CONFIG_BIAS_BUS_HOLD:
-		arg = arg == MSM_KEEPER;
+		arg = arg == pctrl->soc->gpio_pull->keeper;
 		break;
 	case PIN_CONFIG_BIAS_PULL_UP:
-		arg = arg == MSM_PULL_UP;
+		arg = arg == pctrl->soc->gpio_pull->pull_up;
 		break;
 	case PIN_CONFIG_DRIVE_STRENGTH:
 		arg = msm_regval_to_drive(arg);
 		break;
+	case PIN_CONFIG_DRIVE_TYPE:
+	case PIN_CONFIG_DRIVE_CAP:
+		break;
 	case PIN_CONFIG_OUTPUT:
 		/* Pin is not output */
 		if (!arg)
@@ -268,6 +282,20 @@
 			return -EINVAL;
 		arg = 1;
 		break;
+	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+	case PIN_CONFIG_VM:
+		arg = arg == 1;
+		break;
+	case PIN_CONFIG_PULL_RES:
+		if (arg == RES_10_KOHM)
+			arg = 10;
+		else if (arg == RES_1_5_KOHM)
+			arg = 1.5;
+		else if (arg == RES_35_KOHM)
+			arg = 35;
+		else
+			arg = 20;
+		break;
 	default:
 		return -ENOTSUPP;
 	}
@@ -306,16 +334,16 @@
 		/* Convert pinconf values to register values */
 		switch (param) {
 		case PIN_CONFIG_BIAS_DISABLE:
-			arg = MSM_NO_PULL;
+			arg = pctrl->soc->gpio_pull->no_pull;
 			break;
 		case PIN_CONFIG_BIAS_PULL_DOWN:
-			arg = MSM_PULL_DOWN;
+			arg = pctrl->soc->gpio_pull->pull_down;
 			break;
 		case PIN_CONFIG_BIAS_BUS_HOLD:
-			arg = MSM_KEEPER;
+			arg = pctrl->soc->gpio_pull->keeper;
 			break;
 		case PIN_CONFIG_BIAS_PULL_UP:
-			arg = MSM_PULL_UP;
+			arg = pctrl->soc->gpio_pull->pull_up;
 			break;
 		case PIN_CONFIG_DRIVE_STRENGTH:
 			/* Check for invalid values */
@@ -324,6 +352,11 @@
 			else
 				arg = (arg / 2) - 1;
 			break;
+		case PIN_CONFIG_DRIVE_TYPE:
+		case PIN_CONFIG_DRIVE_CAP:
+		case PIN_CONFIG_PULL_RES:
+		case PIN_CONFIG_VM:
+			break;
 		case PIN_CONFIG_OUTPUT:
 			/* set output value */
 			spin_lock_irqsave(&pctrl->lock, flags);
@@ -342,6 +375,9 @@
 			/* disable output */
 			arg = 0;
 			break;
+		case PIN_CONFIG_DRIVE_OPEN_DRAIN:
+			arg = 1;
+			break;
 		default:
 			dev_err(pctrl->dev, "Unsupported config parameter: %x\n",
 				param);
@@ -638,6 +674,9 @@
 	const struct msm_pingroup *g;
 	unsigned long flags;
 	u32 val;
+	u32 addr;
+	int ret;
+	const __be32 *reg;
 
 	g = &pctrl->soc->groups[d->hwirq];
 
@@ -651,11 +690,30 @@
 	else
 		clear_bit(d->hwirq, pctrl->dual_edge_irqs);
 
+	ret = of_device_is_compatible(pctrl->dev->of_node,
+					"qcom,ipq8064-pinctrl");
 	/* Route interrupts to application cpu */
-	val = readl(pctrl->regs + g->intr_target_reg);
-	val &= ~(7 << g->intr_target_bit);
-	val |= g->intr_target_kpss_val << g->intr_target_bit;
-	writel(val, pctrl->regs + g->intr_target_reg);
+	if (!ret) {
+		val = readl(pctrl->regs + g->intr_target_reg);
+		val &= ~(7 << g->intr_target_bit);
+		val |= g->intr_target_kpss_val << g->intr_target_bit;
+		writel(val, pctrl->regs + g->intr_target_reg);
+	} else {
+		reg = of_get_property(pctrl->dev->of_node, "reg", NULL);
+		if (reg) {
+			addr = be32_to_cpup(reg) + g->intr_target_reg;
+			val = qcom_scm_pinmux_read(addr);
+			__iormb();
+
+			val &= ~(7 << g->intr_target_bit);
+			val |= g->intr_target_kpss_val << g->intr_target_bit;
+
+			__iowmb();
+			ret = qcom_scm_pinmux_write(addr, val);
+			if (ret)
+				pr_err("\n Routing interrupts to Apps proc failed");
+		}
+	}
 
 	/* Update configuration for gpio.
 	 * RAW_STATUS_EN is left on for all gpio irqs. Due to the
@@ -871,6 +929,7 @@
 	struct msm_pinctrl *pctrl;
 	struct resource *res;
 	int ret;
+	void avmgpio_register_msm_pinctrl(struct msm_pinctrl *pctrl);
 
 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
 	if (!pctrl) {
@@ -915,6 +974,7 @@
 
 	dev_dbg(&pdev->dev, "Probed Qualcomm pinctrl driver\n");
 
+	avmgpio_register_msm_pinctrl(pctrl->regs);
 	return 0;
 }
 EXPORT_SYMBOL(msm_pinctrl_probe);
@@ -931,4 +991,3 @@
 	return 0;
 }
 EXPORT_SYMBOL(msm_pinctrl_remove);
-