--- zzzz-none-000/linux-2.6.32.61/arch/mips/Kconfig 2013-06-10 09:43:48.000000000 +0000 +++ virian-300e-630/linux-2.6.32.61/arch/mips/Kconfig 2014-09-30 14:33:04.000000000 +0000 @@ -5,9 +5,15 @@ select HAVE_IDE select HAVE_OPROFILE select HAVE_ARCH_KGDB + select HAVE_FUNCTION_TRACER + select HAVE_FUNCTION_TRACE_MCOUNT_TEST + select HAVE_DYNAMIC_FTRACE + select HAVE_FTRACE_MCOUNT_RECORD + select HAVE_FUNCTION_GRAPH_TRACER # Horrible source of confusion. Die, die, die ... select EMBEDDED select RTC_LIB if !LEMOTE_FULOONG2E + select HAVE_OPROFILE mainmenu "Linux/MIPS Kernel Configuration" @@ -43,6 +49,29 @@ Support for the Texas Instruments AR7 System-on-a-Chip family: TNETD7100, 7200 and 7300. +config MIPS_UR8 + bool "Texas Instruments UR8" + select HW_HAS_PCI + select BOOT_ELF32 + select DMA_NONCOHERENT + select CEVT_R4K + select CSRC_R4K + select IRQ_CPU + select NO_EXCEPT_FILL + select SWAP_IO_SPACE + select MIPS_BOARDS_GEN + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN + select GENERIC_GPIO + select GCD + select VLYNQ + select GENERIC_HARDIRQS_NO__DO_IRQ + help + Support for the Texas Instruments UR8 System-on-a-Chip + config BASLER_EXCITE bool "Basler eXcite smart camera" select CEVT_R4K @@ -115,6 +144,14 @@ select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN +config MACH_FUSIV + bool "Fusiv processor based boards" + select MIPS_FUSIV + +config LANTIQ + bool "Support for Lantiq chips" + select SYS_HAS_EARLY_PRINTK + config MACH_DECSTATION bool "DECstations" select BOOT_ELF32 @@ -671,8 +708,217 @@ Hikari Say Y here for most Octeon reference boards. +config MACH_AR7240 + bool "Support for Atheros ar7240 based board" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + select HAVE_KERNEL_LZMA + select MACH_ATHEROS + select HAVE_OPROFILE + +config WASP_SUPPORT + bool "build system for WASP based board" + depends on MACH_AR7240 + +config MACH_AR724x + bool "Support for Atheros ar724x based board" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + select HAVE_KERNEL_LZMA + select ATH_BSP + select MACH_ATHEROS + select GENERIC_HARDIRQS_NO__DO_IRQ + +config MACH_AR933x + bool "Support for Atheros ar933x based board" + select HAVE_KERNEL_LZMA + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HAVE_KERNEL_LZMA + select ATH_BSP + select MACH_ATHEROS + +config MACH_AR934x + bool "Support for Atheros AR934x based board" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + select HAVE_KERNEL_LZMA + select ATH_BSP + select MACH_ATHEROS + select GENERIC_HARDIRQS_NO__DO_IRQ + +config MACH_QCA955x + bool "Support for Atheros QCA955x based board" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + select HAVE_KERNEL_LZMA + select ATH_BSP + select MACH_ATHEROS + select GENERIC_HARDIRQS_NO__DO_IRQ + +config MACH_QCA953x + bool "Support for Atheros QCA953x based board" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + select HAVE_KERNEL_LZMA + select ATH_BSP + select MACH_ATHEROS + select GENERIC_HARDIRQS_NO__DO_IRQ + +config MACH_QCA956x + bool "Support for Atheros QCA956x based board" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + select HAVE_KERNEL_LZMA + select ATH_BSP + select MACH_ATHEROS + select GENERIC_HARDIRQS_NO__DO_IRQ + +config MACH_AR7100 + bool "Support for Atheros ar7100 based boards" + select DMA_NONCOHERENT + select IRQ_CPU + select CEVT_R4K + select CSRC_R4K + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN + select HW_HAS_PCI + endchoice +config NMI_ARBITER_WORKAROUND + bool "Workaround for Atheros ar934x based board" + default y + depends on MACH_AR934x + + +config ATH_DDR_RELEASE_TIMER + int "Use RST Timer 2 to prevent CPU hogging the DDR" + depends on MACH_AR934x || MACH_QCA955x || MACH_QCA953x + default 0 if MACH_AR934x || MACH_QCA955x || MACH_QCA953x + help + Use the second RST Timer to prevent CPU from hogging the DDR + Set this to zero to turn off this feature + +config ATH_TURN_ON_DDR_HOG + bool "DDR Hog code [Debug helpers]" + depends on MACH_AR934x || MACH_QCA955x || MACH_QCA953x + default n + help + DDR Hogging code snippets. This is used while testing + to re-create USB Babble (or) SLIC/I2S failures. + +config ATH_TEST_TIMER + bool "Validate WDT and other timers" + depends on MACH_QCA955x || MACH_QCA953x + default n + +config ATH_EMULATION + bool "Build for Atheros emulation boards" + depends on MACH_AR724x || MACH_AR933x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x + +config INSMOD_KSEG0 + bool "Allocation of code segment when inserting module from KSEG0" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x || MACH_QCA956x + +config PERICOM + bool "Pericom Switch support" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x || MACH_QCA956x + +config I2S + bool "I2s support" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR933x || MACH_AR934x || MACH_QCA955x || MACH_QCA956x + default n + +config KMALLOC_MINALIGN_64BYTE + bool "64 byte min alignment for kmalloc" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR933x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x || MACH_QCA956x + default n + +config PRIV_SKB_MEM + bool "Use contiguous fixed memory pool for SKBs of size less than 4KB" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR933x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x + default n + +config PRIV_SKB_MEM_2K + int "Size of memory pool in MB for SKBs of size 2KB - default 5MB" + depends on PRIV_SKB_MEM + default 5 + +config PRIV_SKB_MEM_4K + int "Size of memory pool in MB for SKBs of size 4KB - default 9MB" + depends on PRIV_SKB_MEM + default 9 + +config WLAN_4K_SKB_OPT + bool "Allocate 4K-SKB with separate SKB shinfo to save memory" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x || MACH_QCA956x + default n + +config ATH_PERF + bool "Try to improve Performance" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR934x || MACH_QCA955x || MACH_QCA953x + default n + +config ATH_HWCS + bool "Enable Atheros H/W Checksum Engine" + depends on MACH_AR934x || MACH_QCA955x + default n + +if LANTIQ +#IFX platform specific +source "arch/mips/Kconfig.ifx" +endif + source "arch/mips/alchemy/Kconfig" source "arch/mips/basler/excite/Kconfig" source "arch/mips/bcm63xx/Kconfig" @@ -688,6 +934,34 @@ endmenu +config ATH_BSP + bool + +config WATCHDOG_RESET_TIMER + bool "Support crash recovery depeding on watch dog" + depends on MACH_AR7240 || MACH_AR724x || MACH_AR933x || MACH_AR934x || MACH_HORNET + default n + +config ATH_SYS_TYPE + string "Atheros system type" + depends on ATH_BSP + default "Atheros AR724x" if MACH_AR724x + default "Atheros AR9330 (Hornet)" if MACH_AR933x + default "Atheros AR934x" if MACH_AR934x + default "QCA955x" if MACH_QCA955x + default "QCA953x" if MACH_QCA953x + default "QCA956x" if MACH_QCA956x + +config ATH_MACH_TYPE + int "Atheros MIPS Mach type" + depends on ATH_BSP + default 1 if MACH_AR724x + default 2 if MACH_AR933x + default 3 if MACH_AR934x + default 4 if MACH_QCA955x + default 5 if MACH_QCA953x + default 6 if MACH_QCA956x + config RWSEM_GENERIC_SPINLOCK bool default y @@ -703,6 +977,14 @@ bool default n +config MIPS_FUSIV + bool + default n + +config MACH_ATHEROS + bool + default n + config ARCH_SUPPORTS_OPROFILE bool default y if !MIPS_MT_SMTC @@ -719,6 +1001,174 @@ bool default y +menu "*** AVM Board PCI Configuration ***" + +if !LANTIQ + +config AVM_PCI_DEVICE_COUNT + int 'Number of PCI devices [0..3] wired to AVM Board' + depends on MIPS_UR8 + range 0 3 + default 1 + +config AVM_PCI_INT_A + bool "PCI INT_A pin is used as PCI function" + depends on (AVM_PCI_DEVICE_COUNT != 0) + default y if MIPS_UR8 + default n + +config AVM_PCI_INT_B + bool "PCI INT_B pin is used as PCI function" + depends on (AVM_PCI_DEVICE_COUNT != 0) + default n + +config AVM_PCI_INT_C + bool "PCI INT_C pin is used as PCI function" + depends on (AVM_PCI_DEVICE_COUNT != 0) + default n + +config AVM_PCI_REQ_AND_GNT_0 + bool "PREQ_0 and PGRANT_0 are used as PCI functions" + depends on (AVM_PCI_DEVICE_COUNT != 0) + default y if MIPS_UR8 + default n + +config AVM_PCI_REQ_AND_GNT_1 + bool "PREQ_1 and PGRANT_1 are used as PCI functions" + depends on (AVM_PCI_DEVICE_COUNT != 0) + default n + +config AVM_PCI_REQ_AND_GNT_2 + bool "PREQ_2 and PGRANT_2 are used as PCI functions" + depends on (AVM_PCI_DEVICE_COUNT != 0) + default n + +config AVM_PCI_DEV1_SLOT + int "Device#1 uses PCI Slot [0..15]" + depends on (AVM_PCI_DEVICE_COUNT != 0) + range 0 15 + default 14 + +config AVM_PCI_DEV1_INT + int "Device#1 uses INT Line [A..C] (type 0..2)" + depends on (AVM_PCI_DEVICE_COUNT != 0) + range 0 2 + default 0 + +config AVM_PCI_DEV2_SLOT + int "Device#2 uses PCI Slot [0..15]" + depends on (AVM_PCI_DEVICE_COUNT = 2) || (AVM_PCI_DEVICE_COUNT = 3) + range 0 15 + default 15 + +config AVM_PCI_DEV2_INT + int "Device#2 uses INT Line [A..C] (type 0..2)" + depends on (AVM_PCI_DEVICE_COUNT = 2) || (AVM_PCI_DEVICE_COUNT = 3) + range 0 2 + default 1 + +config AVM_PCI_DEV3_SLOT + int "Device#3 uses PCI Slot [0..15]" + depends on (AVM_PCI_DEVICE_COUNT = 3) + range 0 15 + +config AVM_PCI_DEV3_INT + int "Device#3 uses INT Line [A..C] (type 0..2)" + depends on (AVM_PCI_DEVICE_COUNT = 3) + range 0 2 + default 2 + +endif + +endmenu + +config MIPS_UR8_C55_MEMORY + hex "UR8 c55 Memory allocation in KBytes (0 disabled)" + depends on MIPS_UR8 + default 0 + +config MIPS_UR8_WLAN_MEMORY + hex "UR8 WLAN Memory allocation in KBytes (0 disabled)" + depends on MIPS_UR8 + default 0 + +config MIPS_OHIO_PHY_MEMSTART + hex "Ohio physical ram start" + depends on MIPS_OHIO + default "0x14000000" + +config MIPS_AR7_PHY_MEMSTART + hex "AR7 physical ram start" + depends on MIPS_AR7 + default "0x14000000" + +config MIPS_UR8_PHY_MEMSTART + hex "UR8 physical ram start" + depends on MIPS_UR8 + default "0x14000000" + +config OHIO_CLOCK_SWITCH + bool "Support Clock switching for OHIO" + depends on MIPS_OHIO + default y + +config AR7_CLOCK_SWITCH + bool "Support Clock switching for AR7" + depends on MIPS_AR7 + default y + +config DISABLE_OOM_KILLER + depends on MIPS_OHIO || MIPS_UR8 || MIPS_AR7 + bool "disable out of memory killer" + default y + +config UR8_CLOCK_SWITCH + bool "Support Clock switching for UR8" + depends on MIPS_UR8 + default y + +config VLYNQ_SUPPORT + bool "Support for the Texas Instruments Vlynq" + depends on MIPS_OHIO || MIPS_UR8 || MIPS_AR7 + default y + +config VLYNQ_SUPPORT_CLK + int "Clock speed for the Texas Instruments Vlynq" + depends on VLYNQ_SUPPORT + default 62500000 + +config GPIO_SSI + bool "Support for SSI emulation using GPIO pins" + depends on MIPS_OHIO || MIPS_UR8 || MIPS_AR7 + default n + +config GPIO_SSI_CS + int "GPIO used for CS0" + depends on GPIO_SSI + default 8 + +config GPIO_SSI_CS2 + int "GPIO used for CS2" + depends on GPIO_SSI + default 11 + +config GPIO_SSI_CS3 + int "GPIO used for CS3" + depends on GPIO_SSI + default 3 + +config GPIO_SSI_CLK + int "GPIO used for CLK" + depends on GPIO_SSI + default 4 + +config GPIO_SSI_DATA + int "GPIO used for DATA" + depends on GPIO_SSI + default 5 + + + config GENERIC_CLOCKEVENTS bool default y @@ -729,14 +1179,14 @@ config GENERIC_CMOS_UPDATE bool - default y + default n config SCHED_OMIT_FRAME_POINTER bool default y config GENERIC_HARDIRQS_NO__DO_IRQ - def_bool y + def_bool n # # Select some configuration options automatically based on user selections. @@ -842,6 +1292,17 @@ config MIPS_BONITO64 bool +config MIPS_FPU_EMU + bool "Enable FPU emulation" + default y + help + This option allows building a kernel with or without the Algorithmics + FPU emulator enabled. Turning off this option results in a kernel which + does not catch floating operations exceptions. Make sure that your toolchain + is configured to enable software floating point emulation in that case. + + If unsure say Y here. + config MIPS_MSC bool @@ -854,6 +1315,13 @@ config SYNC_R4K bool +config MIPS_MACHINE + def_bool n + +config IMAGE_CMDLINE_HACK + bool "OpenWrt specific image command line hack" + default n + config NO_IOPORT def_bool n @@ -868,6 +1336,13 @@ config GENERIC_GPIO bool +config CPU_HAS_DSP_ASE + bool "MIPS DSP Extension" + default n + help + Enable this option for the MIPS DSP Application Specific Extension + support in the CPU + # # Endianess selection. Sufficiently obscure so many users don't know what to # answer,so we try hard to limit the available choices. Also the use of a @@ -1072,6 +1547,7 @@ config CPU_MIPS32_R1 bool "MIPS32 Release 1" depends on SYS_HAS_CPU_MIPS32_R1 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_HIGHMEM @@ -1089,9 +1565,10 @@ config CPU_MIPS32_R2 bool "MIPS32 Release 2" depends on SYS_HAS_CPU_MIPS32_R2 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL - select CPU_SUPPORTS_HIGHMEM +# select CPU_SUPPORTS_HIGHMEM help Choose this option to build a kernel for release 2 or later of the MIPS32 architecture. Most modern embedded systems with a 32-bit @@ -1099,9 +1576,43 @@ specific type of processor in your system, choose those that one otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. +config CPU_MIPS_24K + bool "MIPS24Kc" + depends on SYS_HAS_CPU_MIPS32_R2 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL +# select CPU_SUPPORTS_HIGHMEM + help + Choose this option to build a kernel for release 2 or later of the + MIPS32 architecture. Special Version 24kc + +config CPU_MIPS_34K + bool "MIPS34Kc" + depends on SYS_HAS_CPU_MIPS32_R2 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL +# select CPU_SUPPORTS_HIGHMEM + help + Choose this option to build a kernel for release 2 or later of the + MIPS32 architecture. Special Version 34kc + +config CPU_MIPS_74K + bool "MIPS74Kc" + depends on SYS_HAS_CPU_MIPS32_R2 + select CPU_HAS_LLSC + select CPU_HAS_PREFETCH + select CPU_SUPPORTS_32BIT_KERNEL +# select CPU_SUPPORTS_HIGHMEM + help + Choose this option to build a kernel for release 2 or later of the + MIPS32 architecture. Special Version 74kc + config CPU_MIPS64_R1 bool "MIPS64 Release 1" depends on SYS_HAS_CPU_MIPS64_R1 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1121,6 +1632,7 @@ config CPU_MIPS64_R2 bool "MIPS64 Release 2" depends on SYS_HAS_CPU_MIPS64_R2 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1166,6 +1678,7 @@ config CPU_R4300 bool "R4300" depends on SYS_HAS_CPU_R4300 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1174,6 +1687,7 @@ config CPU_R4X00 bool "R4x00" depends on SYS_HAS_CPU_R4X00 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1183,6 +1697,7 @@ config CPU_TX49XX bool "R49XX" depends on SYS_HAS_CPU_TX49XX + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1190,6 +1705,7 @@ config CPU_R5000 bool "R5000" depends on SYS_HAS_CPU_R5000 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1198,12 +1714,14 @@ config CPU_R5432 bool "R5432" depends on SYS_HAS_CPU_R5432 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL config CPU_R5500 bool "R5500" depends on SYS_HAS_CPU_R5500 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HUGEPAGES @@ -1214,6 +1732,7 @@ config CPU_R6000 bool "R6000" depends on EXPERIMENTAL + select CPU_HAS_LLSC depends on SYS_HAS_CPU_R6000 select CPU_SUPPORTS_32BIT_KERNEL help @@ -1223,6 +1742,7 @@ config CPU_NEVADA bool "RM52xx" depends on SYS_HAS_CPU_NEVADA + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL help @@ -1232,6 +1752,7 @@ bool "R8000" depends on EXPERIMENTAL depends on SYS_HAS_CPU_R8000 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_64BIT_KERNEL help @@ -1241,6 +1762,7 @@ config CPU_R10000 bool "R10000" depends on SYS_HAS_CPU_R10000 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1251,6 +1773,7 @@ config CPU_RM7000 bool "RM7000" depends on SYS_HAS_CPU_RM7000 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1259,6 +1782,7 @@ config CPU_RM9000 bool "RM9000" depends on SYS_HAS_CPU_RM9000 + select CPU_HAS_LLSC select CPU_HAS_PREFETCH select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL @@ -1268,6 +1792,7 @@ config CPU_SB1 bool "SB1" depends on SYS_HAS_CPU_SB1 + select CPU_HAS_LLSC select CPU_SUPPORTS_32BIT_KERNEL select CPU_SUPPORTS_64BIT_KERNEL select CPU_SUPPORTS_HIGHMEM @@ -1381,12 +1906,32 @@ bool endmenu +choice + depends on MACH_ADI_FUSIV || MACH_IKAN_MIPS + prompt "Fusiv platform selection" + +config FUSIV_VX200 + bool "Fusiv vox 200 / vox 150" + depends on MACH_ADI_FUSIV + +config FUSIV_VX160 + bool "Fusiv vox 160" + depends on MACH_ADI_FUSIV + +config FUSIV_AT300 + bool "Fusiv AT 100/200/300" + depends on MACH_ADI_FUSIV +config FUSIV_VX180 + bool "Fusiv vox 180" + depends on MACH_IKAN_MIPS +endchoice + # # These two indicate any level of the MIPS32 and MIPS64 architecture # config CPU_MIPS32 bool - default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 + default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS_24K || CPU_MIPS_34K || CPU_MIPS_74K config CPU_MIPS64 bool @@ -1401,7 +1946,7 @@ config CPU_MIPSR2 bool - default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON + default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON || CPU_MIPS_24K || CPU_MIPS_34K || CPU_MIPS_74K config SYS_SUPPORTS_32BIT_KERNEL bool @@ -1423,6 +1968,24 @@ menu "Kernel type" +config LTQ + bool "Enable LTQ enhancements" + default y + help + Enables all config options and features added by LTQ. + +config LTQ_SYS_OPT + bool "LTQ sys optimization" + depends on LTQ + help + Enbaling this feature improves the networking performance + due to LTQ enhancements to IRQ scheduling. + +config LTQ_OPTIMIZATION + bool "Kernel LTQ optimizations" + help + Kernel LTQ optimizations + choice prompt "Kernel code model" @@ -1498,6 +2061,15 @@ endchoice +config THREAD_SIZE_ORDER + int "Kernel stack size order (2^n)" + default 1 + help + Kernel stack size order (normaly 1) + On 4K page size: 1 ==> 8K stack + 2 ==> 16K stack + 3 ==> 32K stack + config BOARD_SCACHE bool @@ -1531,6 +2103,18 @@ config CPU_HAS_PREFETCH bool +config AVM_WP + bool "AVM Watchpoint Handler for MIPS 34Kc" + depends on CPU_MIPS_34K + +config AVM_WP_PROC + bool "AVM Watchpoint Handler Proc-Interface" + depends on AVM_WP + +config DUMP_CP0 + bool "Debug Dump of CP0 Registers" + depends on AVM_WP_PROC + choice prompt "MIPS MT options" @@ -1545,6 +2129,7 @@ config MIPS_MT_SMP bool "Use 1 TC on each available VPE for SMP" depends on SYS_SUPPORTS_MULTITHREADING + depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON || CPU_MIPS_24K || CPU_MIPS_34K || CPU_MIPS_74K select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI select MIPS_MT @@ -1559,8 +2144,7 @@ config MIPS_MT_SMTC bool "SMTC: Use all TCs on all VPEs for SMP" - depends on CPU_MIPS32_R2 - #depends on CPU_MIPS64_R2 # once there is hardware ... + depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON || CPU_MIPS_24K || CPU_MIPS_34K || CPU_MIPS_74K depends on SYS_SUPPORTS_MULTITHREADING select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI @@ -1609,6 +2193,49 @@ Includes a loader for loading an elf relocatable object onto another VPE and running it. +config IFX_VPE_EXT + bool "IFX APRP Extensions" + depends on MIPS_VPE_LOADER + default y + help + IFX included extensions in APRP + +config IFX_VPE_CACHE_SPLIT + bool "IFX Cache Split Ways" + depends on IFX_VPE_EXT + help + IFX extension for reserving (splitting) cache ways among VPEs. You must + give kernel command line arguments vpe_icache_shared=0 or + vpe_dcache_shared=0 to enable splitting of icache or dcache + respectively. Then you can specify which cache ways should be + assigned to which VPE. There are total 8 cache ways, 4 each + for dcache and icache: dcache_way0, dcache_way1,dcache_way2, + dcache_way3 and icache_way0,icache_way1, icache_way2,icache_way3. + + For example, if you specify vpe_icache_shared=0 and icache_way2=1, + then the 3rd icache way will be assigned to VPE0 and denied in VPE1. + + For icache, software is required to make atleast one cache way available + for a VPE at all times i.e., one can't assign all the icache ways to one VPE. + + By default, vpe_dcache_shared and vpe_icache_shared are set to 1 + (i.e., both icache and dcache are shared among VPEs) + +config PERFCTRS + bool "34K Performance counters" + depends on MIPS_MT && PROC_FS + default n + help + 34K Performance counter through /proc + +config MTSCHED + bool "Support mtsched priority configuration for TCs" + depends on MIPS_MT && PROC_FS + default y + help + Support for mtsched priority configuration for TCs through + /proc/mips/mtsched + config MIPS_MT_SMTC_IM_BACKSTOP bool "Use per-TC register bits as backstop for inhibited IM bits" depends on MIPS_MT_SMTC @@ -1688,6 +2315,12 @@ config 64BIT_PHYS_ADDR bool +config CPU_HAS_LLSC + bool + +config MIPS_74K_KERNEL_OPTIMIZATION + bool + config CPU_HAS_SMARTMIPS depends on SYS_SUPPORTS_SMARTMIPS bool "Support for the SmartMIPS ASE" @@ -2042,10 +2675,21 @@ config HW_HAS_PCI bool +config ATH_HAS_PCI_RC2 + bool "Support for PCI controller RC2" + depends on HW_HAS_PCI + select PCI_DOMAINS + help + Find out whether you have a RC2 in the system. RC2 is the name of a + 2nd PCIe Root Complex.Other default Root Complex is RC1. + If you have RC2,say Y, otherwise N. + + config PCI bool "Support for PCI controller" depends on HW_HAS_PCI select PCI_DOMAINS + select ARCH_SUPPORTS_MSI if ((VR9 || AR10) && IFX_PCIE) help Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside @@ -2055,6 +2699,12 @@ config PCI_DOMAINS bool +config ATH_LOW_POWER_ENABLE + bool "Enable Low-Power-Support for Atheros PCIe" + depends on MACH_934x + default n + +source "drivers/pci/pcie/Kconfig" source "drivers/pci/Kconfig" # @@ -2173,10 +2823,26 @@ depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP config ARCH_SUSPEND_POSSIBLE - def_bool y + def_bool n depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP source "kernel/power/Kconfig" +source "drivers/cpufreq/Kconfig" +source "drivers/cpuidle/Kconfig" + +config AVM_CPUFREQ + bool "AVM CPUFREQ interface support" + depends on PM && (LANTIQ || MIPS_UR8) + default no + help + This option will enable CPUFREQ interface support on LANTIQ/UR8 + +config AVM_CPUIDLE + bool "AVM CPUIDLE interface support" + depends on PM && (LANTIQ || MIPS_UR8) + default no + help + This option will enable CPUIDLE interface support on LANTIQ/UR8 endmenu @@ -2193,3 +2859,8 @@ source "crypto/Kconfig" source "lib/Kconfig" + +if MACH_FUSIV +source "fusiv_src/kernel/Kconfig" +endif # MACH_FUSIV +