#include "qcom-ipq8064-v1.0.dtsi" / { model = "Qualcomm IPQ8064/AP148"; compatible = "qcom,ipq8064-ap148", "qcom,ipq8064"; reserved-memory { #address-cells = <1>; #size-cells = <1>; rsvd@41200000 { reg = <0x41200000 0x300000>; no-map; }; }; aliases { mdio-gpio0 = &mdio0; }; soc { pinmux@800000 { pinctrl-0 = <&mdio0_pins_default &rgmii2_pins_default>; pinctrl-names = "default"; i2c4_pins: i2c4_pinmux { pins = "gpio12", "gpio13"; function = "gsbi4"; bias-disable; }; pcie1_pins: pcie1_pinmux { mux { pins = "gpio3"; drive-strength = <2>; bias-disable; }; }; pcie2_pins: pcie2_pinmux { mux { pins = "gpio48"; drive-strength = <2>; bias-disable; }; }; spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; function = "gsbi5"; drive-strength = <10>; bias-none; }; cs { pins = "gpio20"; drive-strength = <12>; }; }; nand_pins: nand_pins { mux { pins = "gpio34", "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; function = "nand"; drive-strength = <10>; bias-disable; }; pullups { pins = "gpio39"; bias-pull-up; }; hold { pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; bias-bus-hold; }; }; mdio0_pins_default: mdio0_pins_default { mux { pins = "gpio0", "gpio1"; function = "mdio"; drive-strength = <8>; bias-disable; }; clk { pins = "gpio1"; input-disable; }; }; rgmii2_pins_default: rgmii2_pins_default { mux { pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ; function = "rgmii2"; drive-strength = <8>; bias-disable; }; tx { pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ; input-disable; }; }; }; gsbi@16300000 { qcom,mode = ; status = "ok"; serial@16340000 { status = "ok"; }; i2c4: i2c@16380000 { status = "ok"; clock-frequency = <200000>; pinctrl-0 = <&i2c4_pins>; pinctrl-names = "default"; }; }; gsbi5: gsbi@1a200000 { qcom,mode = ; status = "ok"; spi4: spi@1a280000 { status = "ok"; spi-max-frequency = <50000000>; pinctrl-0 = <&spi_pins>; pinctrl-names = "default"; cs-gpios = <&qcom_pinmux 20 0>; dmas = <&adm_dma 6 9>, <&adm_dma 5 10>; dma-names = "rx", "tx"; flash: m25p80@0 { compatible = "s25fl256s1"; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <50000000>; reg = <0>; m25p,fast-read; partition@0 { label = "rootfs"; reg = <0x0 0x1000000>; }; partition@1 { label = "scratch"; reg = <0x1000000 0x1000000>; }; }; }; }; pci@1b500000 { status = "ok"; reset-gpio = <&qcom_pinmux 3 0>; pinctrl-0 = <&pcie1_pins>; pinctrl-names = "default"; ranges = <0x00000000 0 0x00000000 0x0ff00000 0 0x00100000 /* configuration space */ 0x81000000 0 0 0x0fe00000 0 0x00100000 /* downstream I/O */ 0x82000000 0 0x00000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */ }; pci@1b700000 { status = "ok"; reset-gpio = <&qcom_pinmux 48 0>; pinctrl-0 = <&pcie2_pins>; pinctrl-names = "default"; ranges = <0x00000000 0 0x00000000 0x31f00000 0 0x00100000 /* configuration space */ 0x81000000 0 0 0x31e00000 0 0x00100000 /* downstream I/O */ 0x82000000 0 0x00000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */ }; sata-phy@1b400000 { status = "ok"; }; sata@29000000 { status = "ok"; }; dma@18300000 { status = "ok"; }; nand@0x1ac00000 { status = "ok"; pinctrl-0 = <&nand_pins>; pinctrl-names = "default"; }; tcsr@1a400000 { status = "ok"; qcom,usb-ctrl-select = ; }; phy@100f8800 { /* USB3 port 1 HS phy */ status = "ok"; }; phy@100f8830 { /* USB3 port 1 SS phy */ status = "ok"; }; phy@110f8800 { /* USB3 port 0 HS phy */ status = "ok"; }; phy@110f8830 { /* USB3 port 0 SS phy */ status = "ok"; }; usb30@0 { status = "ok"; }; usb30@1 { status = "ok"; }; mdio0: mdio { compatible = "virtual,mdio-gpio"; #address-cells = <1>; #size-cells = <0>; gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>; phy0: ethernet-phy@0 { device_type = "ethernet-phy"; reg = <0>; qca,ar8327-initvals = < 0x00004 0x7600000 /* PAD0_MODE */ 0x00008 0x1000000 /* PAD5_MODE */ 0x0000c 0x80 /* PAD6_MODE */ 0x000e4 0xaa545 /* MAC_POWER_SEL */ 0x000e0 0xc74164de /* SGMII_CTRL */ 0x0007c 0x4e /* PORT0_STATUS */ 0x00094 0x4e /* PORT6_STATUS */ >; }; phy4: ethernet-phy@4 { device_type = "ethernet-phy"; reg = <4>; }; }; nss0: nss@40000000 { compatible = "qcom,nss0"; interrupts = <0 213 0x4>; reg = <0x36000000 0x1000 0x39000000 0x20000>; reg-names = "nphys", "vphys"; clocks = <&gcc NSS_CORE_CLK>, <&gcc NSSTCM_CLK_SRC>, <&gcc NSSTCM_CLK>; clock-names = "nss_core_clk", "nss_tcm_src", "nss_tcm_clk"; resets = <&gcc UBI32_CORE1_CLKRST_CLAMP_RESET>, <&gcc UBI32_CORE1_CLAMP_RESET>, <&gcc UBI32_CORE1_AHB_RESET>, <&gcc UBI32_CORE1_AXI_RESET>; reset-names = "clkrst_clamp", "clamp", "ahb", "axi"; qcom,id = <0>; qcom,num_irq = <1>; qcom,rst_addr = <0x40000000>; qcom,load_addr = <0x40000000>; qcom,turbo_frequency = <1>; qcom,ipv4_enabled = <1>; qcom,ipv6_enabled = <1>; qcom,l2switch_enabled = <1>; qcom,crypto_enabled = <0>; qcom,ipsec_enabled = <0>; qcom,wlan_enabled = <0>; qcom,tun6rd_enabled = <1>; qcom,tunipip6_enabled = <1>; qcom,shaping_enabled = <1>; qcom,gmac0_enabled = <1>; qcom,gmac1_enabled = <1>; qcom,gmac2_enabled = <1>; qcom,gmac3_enabled = <1>; }; nss-gmac-common { reg = <0x03000000 0x0000FFFF 0x1bb00000 0x0000FFFF 0x00900000 0x00004000>; reg-names = "nss_reg_base" , "qsgmii_reg_base", "clk_ctl_base"; }; gmac1: ethernet@37200000 { device_type = "network"; compatible = "qcom,nss-gmac1"; reg = <0x37200000 0x200000>; qcom,id = <1>; qcom,phy_mdio_addr = <4>; qcom,poll_required = <1>; qcom,rgmii_delay = <0>; qcom,phy_mii_type = <0>; qcom,emulation = <0>; qcom,forced_speed = <1000>; qcom,forced_duplex = <1>; local-mac-address = [000000000000]; mdiobus = <&mdio0>; }; gmac2: ethernet@37400000 { device_type = "network"; compatible = "qcom,nss-gmac2"; reg = <0x37400000 0x200000>; qcom,id = <2>; qcom,phy_mdio_addr = <0>; qcom,poll_required = <0>; qcom,rgmii_delay = <0>; qcom,phy_mii_type = <1>; qcom,emulation = <0>; qcom,forced_speed = <1000>; qcom,forced_duplex = <1>; local-mac-address = [000000000000]; mdiobus = <&mdio0>; }; }; };