/dts-v1/;
#include <linux/avm_hw_config_def.h>
#include <asm/mach-lantiq/common/ifx_gpio_def.h>

/ {
	avm-hw-revision{
		compatible = "avm,avm_hw_revision";
		revision = "209";
	};
	avm-gpio{
		compatible = "avm,avm_gpio_generic";
		gpio_avm_led_power{
			value = <6>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_power_red{
			value = <5>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_internet{
			value = <34>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_dect{
			value = <15>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_wlan{
			value = <0>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_info{
			value = <35>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_button_dect{
			value = <2>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_button_wlan{
			value = <1>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_dect_reset{
			value = <33>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PIGLET>;
		};
		gpio_avm_dect_rd{
			value = <8>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_PIGLET>;
		};
		gpio_avm_tdm_fsc{
			value = <9>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_TDMCHECK>;
		};
		gpio_avm_tdm_dcl{
			value = <18>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_TDMCHECK>;
		};
		gpio_avm_tdm_enable_dcl{
			value = <7>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_TDMCHECK>;
		};
		gpio_avm_pcmlink_fsc{
			value = <9>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_do{
			value = <16>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_di{
			value = <17>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_OD_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_dcl{
			value = <18>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_clk_enable{
			value = <7>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_flash_cs{
			value = <10>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_flash_wp{
			value = <12>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_clk{
			value = <18>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_do{
			value = <17>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_di{
			value = <16>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_flash_cs{
			value = <10>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_nand_ale{
			value = <13>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_nand_cle{
			value = <24>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_nand_rd{
			value = <49>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_pcie_reset0{
			value = <11>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCIE>;
		};
		gpio_avm_boot_sel2{
			value = <23>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_HIGH>;
		};
		gpio_avm_boot_sel3{
			value = <38>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_HIGH>;
		};
		gpio_avm_boot_sel4{
			value = <49>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_HIGH>;
		};
	};
};