#include <linux/avm_hw_config_def.h>
#include <asm/mach-lantiq/common/ifx_gpio_def.h>
#include "vr9.dtsi"

/ {
	avm-hw-revision{
		compatible = "avm,avm_hw_revision";
		revision = "243";
	};
	avm-gpio{
		compatible = "avm,avm_gpio_generic";
        gpio_avm_sff_tx_en{
            value = <6>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_CLEAR>;
            module_id = <DEF_IFX_GPIO_MODULE_TEST DEF_IFX_GPIO_MODULE_EARLY_REGISTER DEF_IFX_GPIO_MODULE_LED>;
        };
		gpio_avm_led_power{
			value = <45>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_fiber{
			value = <47>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_wlan{
			value = <36>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_internet{
			value = <35>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_info{
			value = <33>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_led_info_red{
			value = <46>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OUTPUT_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_button_dect{
			value = <1>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_button_wlan{
			value = <29>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_LED>;
		};
		gpio_avm_dect_reset{
			value = <30>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PIGLET>;
		};
		gpio_avm_dect_uart_rx{
			value = <11>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_PIGLET>;
		};
		gpio_avm_dect_uart_tx{
			value = <12>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PIGLET>;
		};
		gpio_avm_piglet_noemif_prog{
			value = <15>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_piglet_noemif_clk{
			value = <28>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_piglet_noemif_data{
			value = <20>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_piglet_noemif_done{
			value = <19>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_piglet_noemif_fpgaok{
			value = <8>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_piglet_dect_in{
			value = <9>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_piglet_clockout{
			value = <7>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_FPGA>;
		};
		gpio_avm_tdm_fsc{
			value = <0>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_TDMCHECK>;
		};
		gpio_avm_tdm_dcl{
			value = <40>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_TDMCHECK>;
		};
		gpio_avm_pcmlink_fsc{
			value = <0>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_do{
			value = <25>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_di{
			value = <41>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_pcmlink_dcl{
			value = <40>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDEN_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCMLINK>;
		};
		gpio_avm_spi_clk{
			value = <18>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_do{
			value = <17>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_di{
			value = <16>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_SSC>;
		};
		gpio_avm_spi_flash_cs{
			value = <10>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_SPI_FLASH>;
		};
		gpio_avm_nand_ale{
			value = <13>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_nand_cle{
			value = <24>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_nand_rd{
			value = <49>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_nand_rd_by{
			value = <48>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_avm_nand_cs1{
			value = <23>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_NAND>;
		};
		gpio_usb_power_enable{
			value = <14>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_USB DEF_IFX_GPIO_MODULE_EARLY_REGISTER>;
		};
		gpio_avm_extphy_25mhz{
			value = <3>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_25MHZ_CLOCK>;
		};
		gpio_avm_extphy1_reset{
			value = <32>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_RESET>;
		};
		gpio_avm_extphy2_reset{
			value = <44>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_RESET>;
		};
		gpio_avm_extswitch_int{
			value = <27>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_INT>;
		};
		gpio_avm_extphy_int{
			value = <39>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_IN IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_INT>;
		};
		gpio_avm_mii_mdio{
			value = <42>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_MDIO>;
		};
		gpio_avm_mii_mdc{
			value = <43>;
			param = <AVM_DEF_HW_PARAM_NO_PARAM>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_SET IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR>;
			module_id = <DEF_IFX_GPIO_MODULE_EXTPHY_MDIO>;
		};
		gpio_avm_pcie_reset0{
			value = <21>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCIE>;
		};
		gpio_avm_pcie_chip_reset0{
			value = <22>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_PCIE>;
		};
		gpio_avm_offload_wasp_wakeup{
			value = <5>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_WLAN_OFFLOAD_WASP_RESET>;
		};
		gpio_avm_offload_wasp_reset{
			value = <34>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_LOW>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_WLAN_OFFLOAD_WASP_RESET>;
		};
		gpio_avm_offload_scrpn_uart{
			value = <31>;
			param = <AVM_DEF_HW_PARAM_GPIO_OUT_ACTIVE_HIGH>;
			config = <IFX_GPIO_IOCTL_PIN_CONFIG_DIR_OUT IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL0_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_ALTSEL1_CLEAR IFX_GPIO_IOCTL_PIN_CONFIG_OD_SET IFX_GPIO_IOCTL_PIN_CONFIG_PUDSEL_SET>;
			module_id = <DEF_IFX_GPIO_MODULE_WLAN_OFFLOAD_SCRPN_UART>;
		};
		gpio_avm_boot_sel3{
			value = <4>;
			param = <AVM_DEF_HW_PARAM_GPIO_IN_ACTIVE_HIGH>;
		};
	};
};