--- zzzz-none-000/linux-3.10.107/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h	2017-06-27 09:49:32.000000000 +0000
+++ vr9-7490-729/linux-3.10.107/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h	2021-11-10 11:53:52.000000000 +0000
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2008-2011 Code Aurora Forum. All rights reserved.
+ * Copyright (c) 2008-2012 The Linux Foundation. All rights reserved.
  * Author: Brian Swetland <swetland@google.com>
  *
  * This software is licensed under the terms of the GNU General Public
@@ -35,69 +35,56 @@
  *
  */
 
-#define MSM_VIC_BASE          IOMEM(0xE0000000)
-#define MSM_VIC_PHYS          0xC0080000
-#define MSM_VIC_SIZE          SZ_4K
+#define MSM7X30_VIC_PHYS		0xC0080000
+#define MSM7X30_VIC_SIZE		SZ_4K
 
-#define MSM7X30_CSR_PHYS      0xC0100000
-#define MSM7X30_CSR_SIZE      SZ_4K
+#define MSM7X30_CSR_PHYS		0xC0100000
+#define MSM7X30_CSR_SIZE		SZ_4K
 
-#define MSM_DMOV_BASE         IOMEM(0xE0002000)
-#define MSM_DMOV_PHYS         0xAC400000
-#define MSM_DMOV_SIZE         SZ_4K
+#define MSM7X30_TMR_PHYS		MSM7X30_CSR_PHYS
+#define MSM7X30_TMR_SIZE		SZ_4K
 
-#define MSM7X30_GPIO1_PHYS        0xAC001000
-#define MSM7X30_GPIO1_SIZE        SZ_4K
+#define MSM7X30_GPIO1_PHYS		0xAC001000
+#define MSM7X30_GPIO1_SIZE		SZ_4K
 
-#define MSM7X30_GPIO2_PHYS        0xAC101000
-#define MSM7X30_GPIO2_SIZE        SZ_4K
+#define MSM7X30_GPIO2_PHYS		0xAC101000
+#define MSM7X30_GPIO2_SIZE		SZ_4K
 
-#define MSM_CLK_CTL_BASE      IOMEM(0xE0005000)
-#define MSM_CLK_CTL_PHYS      0xAB800000
-#define MSM_CLK_CTL_SIZE      SZ_4K
+#define MSM7X30_CLK_CTL_PHYS		0xAB800000
+#define MSM7X30_CLK_CTL_SIZE		SZ_4K
 
-#define MSM_CLK_CTL_SH2_BASE  IOMEM(0xE0006000)
-#define MSM_CLK_CTL_SH2_PHYS  0xABA01000
-#define MSM_CLK_CTL_SH2_SIZE  SZ_4K
+#define MSM7X30_CLK_CTL_SH2_PHYS	0xABA01000
+#define MSM7X30_CLK_CTL_SH2_SIZE	SZ_4K
 
-#define MSM_ACC_BASE          IOMEM(0xE0007000)
-#define MSM_ACC_PHYS          0xC0101000
-#define MSM_ACC_SIZE          SZ_4K
+#define MSM7X30_ACC0_PHYS		0xC0101000
+#define MSM7X30_ACC0_SIZE		SZ_4K
 
-#define MSM_SAW_BASE          IOMEM(0xE0008000)
-#define MSM_SAW_PHYS          0xC0102000
-#define MSM_SAW_SIZE          SZ_4K
+#define MSM7X30_SAW0_PHYS		0xC0102000
+#define MSM7X30_SAW0_SIZE		SZ_4K
 
-#define MSM_GCC_BASE	      IOMEM(0xE0009000)
-#define MSM_GCC_PHYS	      0xC0182000
-#define MSM_GCC_SIZE	      SZ_4K
+#define MSM7X30_APCS_GCC_PHYS		0xC0182000
+#define MSM7X30_APCS_GCC_SIZE		SZ_4K
 
-#define MSM_TCSR_BASE	      IOMEM(0xE000A000)
-#define MSM_TCSR_PHYS	      0xAB600000
-#define MSM_TCSR_SIZE	      SZ_4K
+#define MSM7X30_TCSR_PHYS		0xAB600000
+#define MSM7X30_TCSR_SIZE		SZ_4K
 
-#define MSM_SHARED_RAM_BASE   IOMEM(0xE0100000)
-#define MSM_SHARED_RAM_PHYS   0x00100000
-#define MSM_SHARED_RAM_SIZE   SZ_1M
+#define MSM7X30_UART1_PHYS		0xACA00000
+#define MSM7X30_UART1_SIZE		SZ_4K
 
-#define MSM_UART1_PHYS        0xACA00000
-#define MSM_UART1_SIZE        SZ_4K
+#define MSM7X30_UART2_PHYS		0xACB00000
+#define MSM7X30_UART2_SIZE		SZ_4K
 
-#define MSM_UART2_PHYS        0xACB00000
-#define MSM_UART2_SIZE        SZ_4K
+#define MSM7X30_UART3_PHYS		0xACC00000
+#define MSM7X30_UART3_SIZE		SZ_4K
 
-#define MSM_UART3_PHYS        0xACC00000
-#define MSM_UART3_SIZE        SZ_4K
+#define MSM7X30_MDC_PHYS		0xAA500000
+#define MSM7X30_MDC_SIZE		SZ_1M
 
-#define MSM_MDC_BASE	      IOMEM(0xE0200000)
-#define MSM_MDC_PHYS	      0xAA500000
-#define MSM_MDC_SIZE	      SZ_1M
+#define MSM7X30_AD5_PHYS		0xA7000000
+#define MSM7X30_AD5_SIZE		(SZ_1M*13)
 
-#define MSM_AD5_BASE          IOMEM(0xE0300000)
-#define MSM_AD5_PHYS          0xA7000000
-#define MSM_AD5_SIZE          (SZ_1M*13)
-
-#define MSM_HSUSB_PHYS        0xA3600000
-#define MSM_HSUSB_SIZE        SZ_1K
+#ifndef __ASSEMBLY__
+extern void msm_map_msm7x30_io(void);
+#endif
 
 #endif