--- zzzz-none-000/linux-3.10.107/arch/mips/ath79/common.c	2017-06-27 09:49:32.000000000 +0000
+++ vr9-7490-729/linux-3.10.107/arch/mips/ath79/common.c	2021-11-10 11:53:53.000000000 +0000
@@ -17,6 +17,7 @@
 #include <linux/types.h>
 #include <linux/spinlock.h>
 
+#include <atheros.h>
 #include <asm/mach-ath79/ath79.h>
 #include <asm/mach-ath79/ar71xx_regs.h>
 #include "common.h"
@@ -59,27 +60,11 @@
 void ath79_device_reset_set(u32 mask)
 {
 	unsigned long flags;
-	u32 reg;
 	u32 t;
 
-	if (soc_is_ar71xx())
-		reg = AR71XX_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar724x())
-		reg = AR724X_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar913x())
-		reg = AR913X_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar933x())
-		reg = AR933X_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar934x())
-		reg = AR934X_RESET_REG_RESET_MODULE;
-	else if (soc_is_qca955x())
-		reg = QCA955X_RESET_REG_RESET_MODULE;
-	else
-		BUG();
-
 	spin_lock_irqsave(&ath79_device_reset_lock, flags);
-	t = ath79_reset_rr(reg);
-	ath79_reset_wr(reg, t | mask);
+	t = ath79_reset_rr(ATH_RESET_REG_RESET_MODULE);
+	ath79_reset_wr(ATH_RESET_REG_RESET_MODULE, t | mask);
 	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
 }
 EXPORT_SYMBOL_GPL(ath79_device_reset_set);
@@ -87,27 +72,17 @@
 void ath79_device_reset_clear(u32 mask)
 {
 	unsigned long flags;
-	u32 reg;
 	u32 t;
 
-	if (soc_is_ar71xx())
-		reg = AR71XX_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar724x())
-		reg = AR724X_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar913x())
-		reg = AR913X_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar933x())
-		reg = AR933X_RESET_REG_RESET_MODULE;
-	else if (soc_is_ar934x())
-		reg = AR934X_RESET_REG_RESET_MODULE;
-	else if (soc_is_qca955x())
-		reg = QCA955X_RESET_REG_RESET_MODULE;
-	else
-		BUG();
-
 	spin_lock_irqsave(&ath79_device_reset_lock, flags);
-	t = ath79_reset_rr(reg);
-	ath79_reset_wr(reg, t & ~mask);
+	t = ath79_reset_rr(ATH_RESET_REG_RESET_MODULE);
+	ath79_reset_wr(ATH_RESET_REG_RESET_MODULE, t & ~mask);
 	spin_unlock_irqrestore(&ath79_device_reset_lock, flags);
 }
 EXPORT_SYMBOL_GPL(ath79_device_reset_clear);
+
+#if defined(CONFIG_NMI_ARBITER_WORKAROUND)
+struct _nmi_workaround_func nmi_workaround_func;
+EXPORT_SYMBOL(nmi_workaround_func);
+#endif/*--- #if defined(CONFIG_NMI_ARBITER_WORKAROUND) ---*/
+