--- zzzz-none-000/linux-3.10.107/arch/mips/ath79/pci.c	2017-06-27 09:49:32.000000000 +0000
+++ vr9-7490-729/linux-3.10.107/arch/mips/ath79/pci.c	2021-11-10 11:53:53.000000000 +0000
@@ -69,22 +69,18 @@
 	int irq = -1;
 	int i;
 
-	if (ath79_pci_nr_irqs == 0 ||
-	    ath79_pci_irq_map == NULL) {
+	if ((ath79_pci_nr_irqs == 0) || (ath79_pci_irq_map == NULL)) {
 		if (soc_is_ar71xx()) {
 			ath79_pci_irq_map = ar71xx_pci_irq_map;
 			ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map);
-		} else if (soc_is_ar724x() ||
-			   soc_is_ar9342() ||
-			   soc_is_ar9344()) {
+		} else if (soc_is_ar724x() || soc_is_ar9342() || soc_is_ar9344()) {
 			ath79_pci_irq_map = ar724x_pci_irq_map;
 			ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map);
 		} else if (soc_is_qca955x()) {
 			ath79_pci_irq_map = qca955x_pci_irq_map;
 			ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map);
 		} else {
-			pr_crit("pci %s: invalid irq map\n",
-				pci_name((struct pci_dev *) dev));
+			pr_crit("pci %s: invalid irq map\n", pci_name((struct pci_dev *) dev));
 			return irq;
 		}
 	}
@@ -93,26 +89,24 @@
 		const struct ath79_pci_irq *entry;
 
 		entry = &ath79_pci_irq_map[i];
-		if (entry->bus == dev->bus->number &&
-		    entry->slot == slot &&
-		    entry->pin == pin) {
+		if ((entry->bus == dev->bus->number) && (entry->slot == slot) && (entry->pin == pin)) {
 			irq = entry->irq;
 			break;
 		}
 	}
 
-	if (irq < 0)
-		pr_crit("pci %s: no irq found for pin %u\n",
-			pci_name((struct pci_dev *) dev), pin);
-	else
-		pr_info("pci %s: using irq %d for pin %u\n",
-			pci_name((struct pci_dev *) dev), irq, pin);
+	if (irq < 0) {
+		pr_crit("pci %s: no irq found for pin %u\n", pci_name((struct pci_dev *) dev), pin);
+    } else {
+		pr_info("pci %s: using irq %d for pin %u\n", pci_name((struct pci_dev *) dev), irq, pin);
+    }
 
 	return irq;
 }
 
 int pcibios_plat_dev_init(struct pci_dev *dev)
 {
+    printk("{%s}\n", __func__);
 	if (ath79_pci_plat_dev_init)
 		return ath79_pci_plat_dev_init(dev);
 
@@ -158,8 +152,7 @@
 	res[3].start = AR71XX_PCI_MEM_BASE;
 	res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1;
 
-	pdev = platform_device_register_simple("ar71xx-pci", -1,
-					       res, ARRAY_SIZE(res));
+	pdev = platform_device_register_simple("ar71xx-pci", -1, res, ARRAY_SIZE(res));
 	return pdev;
 }
 
@@ -207,8 +200,7 @@
 	res[5].start = crp_base;
 	res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1;
 
-	pdev = platform_device_register_simple("ar724x-pci", id,
-					       res, ARRAY_SIZE(res));
+	pdev = platform_device_register_simple("ar724x-pci", id, res, ARRAY_SIZE(res));
 	return pdev;
 }
 
@@ -218,7 +210,8 @@
 
 	if (soc_is_ar71xx()) {
 		pdev = ath79_register_pci_ar71xx();
-	} else if (soc_is_ar724x()) {
+	} 
+    if (soc_is_ar724x()) {
 		pdev = ath79_register_pci_ar724x(-1,
 						 AR724X_PCI_CFG_BASE,
 						 AR724X_PCI_CTRL_BASE,
@@ -227,8 +220,8 @@
 						 AR724X_PCI_MEM_SIZE,
 						 0,
 						 ATH79_CPU_IRQ(2));
-	} else if (soc_is_ar9342() ||
-		   soc_is_ar9344()) {
+	} 
+    if (soc_is_ar9342() || soc_is_ar9344()) {
 		u32 bootstrap;
 
 		bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
@@ -243,7 +236,9 @@
 						 AR724X_PCI_MEM_SIZE,
 						 0,
 						 ATH79_IP2_IRQ(0));
-	} else if (soc_is_qca9558()) {
+	}
+    if (soc_is_qca9558() || soc_is_qca9556()) {
+
 		pdev = ath79_register_pci_ar724x(0,
 						 QCA955X_PCI_CFG_BASE0,
 						 QCA955X_PCI_CTRL_BASE0,
@@ -253,6 +248,9 @@
 						 0,
 						 ATH79_IP2_IRQ(0));
 
+    }
+    if (soc_is_qca9558()) {
+
 		pdev = ath79_register_pci_ar724x(1,
 						 QCA955X_PCI_CFG_BASE1,
 						 QCA955X_PCI_CTRL_BASE1,
@@ -261,13 +259,11 @@
 						 QCA955X_PCI_MEM_SIZE,
 						 1,
 						 ATH79_IP3_IRQ(2));
-	} else {
-		/* No PCI support */
-		return -ENODEV;
-	}
+	} 
 
 	if (!pdev)
-		pr_err("unable to register PCI controller device\n");
+		printk("unable to register PCI controller device\n");
 
 	return pdev ? 0 : -ENODEV;
 }
+