--- zzzz-none-000/linux-3.10.107/arch/mips/include/asm/cmpxchg.h	2017-06-27 09:49:32.000000000 +0000
+++ vr9-7490-729/linux-3.10.107/arch/mips/include/asm/cmpxchg.h	2021-11-10 11:53:53.000000000 +0000
@@ -22,14 +22,16 @@
 		unsigned long dummy;
 
 		__asm__ __volatile__(
-		"	.set	mips3					\n"
+        "	.set	push					\n"
+        "	.set	mips32r2					\n"
 		"1:	ll	%0, %3			# xchg_u32	\n"
-		"	.set	mips0					\n"
+		"	.set	pop                     \n"
 		"	move	%2, %z4					\n"
-		"	.set	mips3					\n"
+        "	.set	push					\n"
+        "	.set	mips32r2					\n"
 		"	sc	%2, %1					\n"
 		"	beqzl	%2, 1b					\n"
-		"	.set	mips0					\n"
+		"	.set	pop                     \n"
 		: "=&r" (retval), "=m" (*m), "=&r" (dummy)
 		: "R" (*m), "Jr" (val)
 		: "memory");
@@ -38,13 +40,15 @@
 
 		do {
 			__asm__ __volatile__(
-			"	.set	mips3				\n"
+            "	.set	push					\n"
+            "	.set	mips32r2					\n"
 			"	ll	%0, %3		# xchg_u32	\n"
-			"	.set	mips0				\n"
+            "	.set	pop                     \n"
 			"	move	%2, %z4				\n"
-			"	.set	mips3				\n"
+            "	.set	push					\n"
+            "	.set	mips32r2					\n"
 			"	sc	%2, %1				\n"
-			"	.set	mips0				\n"
+            "	.set	pop                     \n"
 			: "=&r" (retval), "=m" (*m), "=&r" (dummy)
 			: "R" (*m), "Jr" (val)
 			: "memory");
@@ -74,12 +78,13 @@
 		unsigned long dummy;
 
 		__asm__ __volatile__(
-		"	.set	mips3					\n"
+        "	.set	push					\n"
+        "	.set	mips32r2					\n"
 		"1:	lld	%0, %3			# xchg_u64	\n"
 		"	move	%2, %z4					\n"
 		"	scd	%2, %1					\n"
 		"	beqzl	%2, 1b					\n"
-		"	.set	mips0					\n"
+		"	.set	pop                     \n"
 		: "=&r" (retval), "=m" (*m), "=&r" (dummy)
 		: "R" (*m), "Jr" (val)
 		: "memory");
@@ -88,11 +93,12 @@
 
 		do {
 			__asm__ __volatile__(
-			"	.set	mips3				\n"
+            "	.set	push					\n"
+            "	.set	mips32r2					\n"
 			"	lld	%0, %3		# xchg_u64	\n"
 			"	move	%2, %z4				\n"
 			"	scd	%2, %1				\n"
-			"	.set	mips0				\n"
+            "	.set	pop                     \n"
 			: "=&r" (retval), "=m" (*m), "=&r" (dummy)
 			: "R" (*m), "Jr" (val)
 			: "memory");
@@ -145,12 +151,12 @@
 		__asm__ __volatile__(					\
 		"	.set	push				\n"	\
 		"	.set	noat				\n"	\
-		"	.set	mips3				\n"	\
+        "	.set	mips32r2					\n" \
 		"1:	" ld "	%0, %2		# __cmpxchg_asm \n"	\
 		"	bne	%0, %z3, 2f			\n"	\
 		"	.set	mips0				\n"	\
 		"	move	$1, %z4				\n"	\
-		"	.set	mips3				\n"	\
+		"	.set	mips32r2				\n"	\
 		"	" st "	$1, %1				\n"	\
 		"	beqzl	$1, 1b				\n"	\
 		"2:						\n"	\
@@ -162,12 +168,12 @@
 		__asm__ __volatile__(					\
 		"	.set	push				\n"	\
 		"	.set	noat				\n"	\
-		"	.set	mips3				\n"	\
+		"	.set	mips32r2				\n"	\
 		"1:	" ld "	%0, %2		# __cmpxchg_asm \n"	\
 		"	bne	%0, %z3, 2f			\n"	\
 		"	.set	mips0				\n"	\
 		"	move	$1, %z4				\n"	\
-		"	.set	mips3				\n"	\
+		"	.set	mips32r2				\n"	\
 		"	" st "	$1, %1				\n"	\
 		"	beqz	$1, 1b				\n"	\
 		"	.set	pop				\n"	\