--- zzzz-none-000/linux-3.10.107/arch/mips/kernel/proc.c	2017-06-27 09:49:32.000000000 +0000
+++ vr9-7490-729/linux-3.10.107/arch/mips/kernel/proc.c	2021-11-10 11:53:54.000000000 +0000
@@ -98,6 +98,7 @@
 	if (cpu_has_mipsmt)	seq_printf(m, "%s", " mt");
 	if (cpu_has_mmips)	seq_printf(m, "%s", " micromips");
 	if (cpu_has_vz)		seq_printf(m, "%s", " vz");
+	if (cpu_has_eva)	seq_printf(m, "%s", " eva");
 	seq_printf(m, "\n");
 
 	if (cpu_has_mmips) {
@@ -109,6 +110,14 @@
 	seq_printf(m, "kscratch registers\t: %d\n",
 		      hweight8(cpu_data[n].kscratch_mask));
 	seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
+#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
+	if (cpu_has_mipsmt) {
+		seq_printf(m, "VPE\t\t\t: %d\n", cpu_data[n].vpe_id);
+#if defined(CONFIG_MIPS_MT_SMTC)
+		seq_printf(m, "TC\t\t\t: %d\n", cpu_data[n].tc_id);
+#endif
+	}
+#endif
 
 	sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
 		      cpu_has_vce ? "%u" : "not available");
@@ -116,6 +125,9 @@
 	seq_printf(m, fmt, 'I', vcei_count);
 	seq_printf(m, "\n");
 
+    seq_printf(m, "mips-options: 0x%08lx icache.flags 0x%08x dcache.flags 0x%08x isa_level 0x%08x ases %08lx\n",
+                    cpu_data[0].options, cpu_data[0].icache.flags, cpu_data[0].dcache.flags, cpu_data[0].isa_level, 
+                    cpu_data[0].ases);
 	return 0;
 }